MT40A512M16HA-083EIT Datasheet, PDF (1/373 Pages) Micron Technology – Programmable data strobe preambles

8Gb: x4, x8, x16 DDR4 SDRAM
Features
DDR4 SDRAM
MT40A2G4
MT40A1G8
MT40A512M16
Features
• V_DD = V_DDQ = 1.2V ±60mV
• V_PP = 2.5V, –125mV, +250mV
• On-die, internal, adjustable V_REFDQ generation
• 1.2V pseudo open-drain I/O
• T_C maximum up to 95°C
– 64ms, 8192-cycle refresh up to 85°C
– 32ms, 8192-cycle refresh at >85°C to 95°C
• 16 internal banks (x4, x8): 4 groups of 4 banks each
• 8 internal banks (x16): 2 groups of 4 banks each
• 8n-bit prefetch architecture
• Programmable data strobe preambles
• Data strobe preamble training
• Command/Address latency (CAL)
• Multipurpose register READ and WRITE capability
• Write and read leveling
• Self refresh mode
• Low-power auto self refresh (LPASR)
• Temperature controlled refresh (TCR)
• Fine granularity refresh
• Self refresh abort
• Maximum power saving
• Output driver calibration
• Nominal, park, and dynamic on-die termination
(ODT)
• Data bus inversion (DBI) for data bus
• Command/Address (CA) parity
• Databus write cyclic redundancy check (CRC)
• Per-DRAM addressability
• Connectivity test (x16)
• JEDEC JESD-79-4 compliant
• sPPR and hPPR capability
Options¹
Marking
• Configuration
– 2 Gig x 4
2G4
– 1 Gig x 8
1G8
– 512 Meg x 16
512M16
• 78-ball FBGA package (Pb-free) – x4, x8
– 9mm x 13.2mm – Rev. A
PM
– 8mm x 12mm – Rev. B, D, G
WE
– 7.5mm x 11mm – Rev. E, H
SA
• 96-ball FBGA package (Pb-free) – x16
– 9mm x 14mm – Rev. A
HA
– 8mm x 14mm – Rev. B
JY
– 7.5mm x 13.5mm – Rev. D, E, H
LY
• Timing – cycle time
– 0.625ns @ CL = 22 (DDR4-3200)
-062E
– 0.682ns @ CL = 20 (DDR4-2933)
-068E
– 0.682ns @ CL = 21 (DDR4-2933)
-068
– 0.750ns @ CL = 18 (DDR4-2666)
-075E
– 0.750ns @ CL = 19 (DDR4-2666)
-075
– 0.833ns @ CL = 16 (DDR4-2400)
-083E
– 0.833ns @ CL = 17 (DDR4-2400)
-083
– 0.937ns @ CL = 15 (DDR4-2133)
-093E
– 0.937ns @ CL = 16 (DDR4-2133)
-093
– 1.071ns @ CL = 13 (DDR4-1866)
-107E
• Operating temperature
– Commercial (0° ≤ T_C ≤ 95°C)
– Industrial (–40° ≤ T_C ≤ 95°C)
• Revision
None
IT
:A,
:B, :D, :G,
:E, :H
Note:
1. Not all options listed can be combined to
define an offered product. Use the part
catalog search on http://www.micron.com
for available offerings.
Table 1: Key Timing Parameters
Speed Grade
-062E⁶
-068E⁵
-068⁵
Data Rate (MT/s)
3200
2933
2933
Target ^tRCD-^tRP-CL
22-22-22
20-20-20
21-21-21
t_{RCD (ns)}
13.75
13.64
14.32
t_{RP (ns)}
13.75
13.64
14.32
CL (ns)
13.75
13.64
14.32
09005aef861d1d4a
8gb_ddr4_dram.pdf - Rev. G 1/17 EN
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Products and specifications discussed herein are subject to change by Micron without notice.