English
Language : 

MT40A512M16HA-083EIT Datasheet, PDF (121/373 Pages) Micron Technology – Programmable data strobe preambles
8Gb: x4, x8, x16 DDR4 SDRAM
VREFDQ Calibration
value may not be exactly within the voltage range setting coupled with the VREF set tol-
erance; the device must be calibrated to the correct internal VREFDQ voltage.
Figure 65: Example of VREF Set Tolerance and Step Size
VREF
Actual VREF
output
VREF set
tolerance
VREF set
tolerance
VREF
step size
Straight line
(endpoint fit)
Note: 1. Maximum case shown.
Digital Code
VREFDQ Increment and Decrement Timing
The VREF increment/decrement step times are defined by VREF,time. VREF,time is defined
from t0 to t1, where t1 is referenced to the VREF voltage at the final DC level within the
VREF valid tolerance (VREF,val_tol). The V REF valid level is defined by VREF,val tolerance to
qualify the step time t1. This parameter is used to insure an adequate RC time constant
behavior of the voltage level change after any VREF increment/decrement adjustment.
Note:
t0 is referenced to the MRS command clock
t1 is referenced to VREF,tol
09005aef861d1d4a
8gb_ddr4_dram.pdf - Rev. G 1/17 EN
121
Micron Technology, Inc. reserves the right to change products or specifications without notice.
‹ 2015 Micron Technology, Inc. All rights reserved.