PIC32MX1XX Datasheet, PDF (97/320 Pages) Microchip Technology – 32-bit Microcontrollers (up to 128 KB Flash and 32 KB SRAM) with Audio and Graphics Interfaces, USB, and Advanced Analog

PIC32MX1XX/2XX
REGISTER 8-1: OSCCON: OSCILLATOR CONTROL REGISTER⁽¹⁾
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Range 31/23/15/7 30/22/14/6 29/21/13/5 28/20/12/4 27/19/11/3 26/18/10/2 25/17/9/1 24/16/8/0
31:24
23:16
15:8
7:0
U-0
—
U-0
—
U-0
—
R/W-0
CLKLOCK
U-0
R/W-y
R/W-y
R/W-y
—
PLLODIV<2:0>
R-0
R-1
R/W-y
R/W-y
SOSCRDY PBDIVRDY
PBDIV<1:0>
R-0
R-0
R-0
U-0
COSC<2:0>
—
R-0
ULOCK⁽²⁾
R-0
SLOCK
R/W-0
SLPEN
R/W-0
CF
R/W-0
R/W-0
FRCDIV<2:0>
R/W-y
R/W-y
PLLMULT<2:0>
R/W-y
R/W-y
NOSC<2:0>
R/W-0
UFRCEN⁽²⁾
R/W-y
SOSCEN
R/W-1
R/W-y
R/W-y
R/W-0
OSWEN
Legend:
R = Readable bit
-n = Value at POR
y = Value set from Configuration bits on POR
W = Writable bit
U = Unimplemented bit, read as ‘0’
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 31-30 Unimplemented: Read as ‘0’
bit 29-27 PLLODIV<2:0>: Output Divider for PLL
111 = PLL output divided by 256
110 = PLL output divided by 64
101 = PLL output divided by 32
100 = PLL output divided by 16
011 = PLL output divided by 8
010 = PLL output divided by 4
001 = PLL output divided by 2
000 = PLL output divided by 1
bit 26-24 FRCDIV<2:0>: Internal Fast RC (FRC) Oscillator Clock Divider bits
111 = FRC divided by 256
110 = FRC divided by 64
101 = FRC divided by 32
100 = FRC divided by 16
011 = FRC divided by 8
010 = FRC divided by 4
001 = FRC divided by 2 (default setting)
000 = FRC divided by 1
bit 23 Unimplemented: Read as ‘0’
bit 22 SOSCRDY: Secondary Oscillator (SOSC) Ready Indicator bit
1 = Indicates that the Secondary Oscillator is running and is stable
0 = Secondary Oscillator is still warming up or is turned off
bit 21 PBDIVRDY: Peripheral Bus Clock (PBCLK) Divisor Ready bit
1 = PBDIV<1:0> bits can be written
0 = PBDIV<1:0> bits cannot be written
bit 20-19 PBDIV<1:0>: Peripheral Bus Clock (PBCLK) Divisor bits
11 = PBCLK is SYSCLK divided by 8 (default)
10 = PBCLK is SYSCLK divided by 4
01 = PBCLK is SYSCLK divided by 2
00 = PBCLK is SYSCLK divided by 1
Note 1: Writes to this register require an unlock sequence. Refer to Section 6. “Oscillator” (DS61112) in the
“PIC32 Family Reference Manual” for details.
2: This bit is available on PIC32MX2XX devices only.
© 2011-2012 Microchip Technology Inc.
Preliminary
DS61168D-page 97