PIC32MX1XX Datasheet, PDF (191/320 Pages) Microchip Technology – 32-bit Microcontrollers (up to 128 KB Flash and 32 KB SRAM) with Audio and Graphics Interfaces, USB, and Advanced Analog

PIC32MX1XX/2XX
REGISTER 19-4: PMAEN: PARALLEL PORT PIN ENABLE REGISTER^(1,2)
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Range 31/23/15/7 30/22/14/6 29/21/13/5 28/20/12/4 27/19/11/3 26/18/10/2 25/17/9/1 24/16/8/0
31:24
23:16
15:8
7:0
U-0
—
U-0
—
U-0
—
R/W-0
U-0
—
U-0
—
R/W-0
PTEN14
R/W-0
U-0
—
U-0
—
U-0
—
R/W-0
U-0
U-0
—
—
U-0
U-0
—
—
U-0
U-0
—
—
R/W-0
R/W-0
PTEN<7:0>
U-0
—
U-0
—
R/W-0
R/W-0
U-0
—
U-0
—
R/W-0
PTEN<10:8>
R/W-0
U-0
—
U-0
—
R/W-0
R/W-0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 31-15 Unimplemented: Read as ‘0’
bit 15-14 PTEN14: PMCS1 Strobe Enable bits
1 = PMA14 functions as either PMA14 or PMCS1⁽¹⁾
0 = PMA14 functions as port I/O
bit 13-11 Unimplemented: Read as ‘0’
bit 10-2 PTEN<10:2>: PMP Address Port Enable bits
1 = PMA<10:2> function as PMP address lines
0 = PMA<10:2> function as port I/O
bit 1-0
PTEN<1:0>: PMALH/PMALL Strobe Enable bits
1 = PMA1 and PMA0 function as either PMA<1:0> or PMALH and PMALL⁽²⁾
0 = PMA1 and PMA0 pads functions as port I/O
Note 1: The use of this pin as PMA14 or CS1 is selected by the CSF<1:0> bits in the PMCON register.
2: The use of these pins as PMA1/PMA0 or PMALH/PMALL depends on the Address/Data Multiplex mode
selected by bits ADRMUX<1:0> in the PMCON register.
© 2011-2012 Microchip Technology Inc.
Preliminary
DS61168D-page 191