PIC32MX1XX Datasheet, PDF (164/320 Pages) Microchip Technology – 32-bit Microcontrollers (up to 128 KB Flash and 32 KB SRAM) with Audio and Graphics Interfaces, USB, and Advanced Analog

PIC32MX1XX/2XX
REGISTER 15-1: OCxCON: OUTPUT COMPARE ‘x’ CONTROL REGISTER
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Range 31/23/15/7 30/22/14/6 29/21/13/5 28/20/12/4 27/19/11/3 26/18/10/2 25/17/9/1
31:24
23:16
15:8
7:0
U-0
—
U-0
—
R/W-0
ON⁽¹⁾
U-0
—
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
U-0
R/W-0
U-0
U-0
U-0
U-0
—
SIDL
—
—
—
—
U-0
R/W-0
R-0
R/W-0
R/W-0
R/W-0
—
OC32
OCFLT⁽²⁾ OCTSEL
OCM<2:0>
Bit
24/16/8/0
U-0
—
U-0
—
U-0
—
R/W-0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 31-16 Unimplemented: Read as ‘0’
bit 15 ON: Output Compare Peripheral On bit⁽¹⁾
1 = Output Compare peripheral is enabled
0 = Output Compare peripheral is disabled
bit 14 Unimplemented: Read as ‘0’
bit 13 SIDL: Stop in Idle Mode bit
1 = Discontinue operation when CPU enters Idle mode
0 = Continue operation in Idle mode
bit 12-6 Unimplemented: Read as ‘0’
bit 5
OC32: 32-bit Compare Mode bit
1 = OCxR<31:0> and/or OCxRS<31:0> are used for comparisions to the 32-bit timer source
0 = OCxR<15:0> and OCxRS<15:0> are used for comparisons to the 16-bit timer source
bit 4
OCFLT: PWM Fault Condition Status bit⁽²⁾
1 = PWM Fault condition has occurred (cleared in HW only)
0 = No PWM Fault condition has occurred
bit 3
OCTSEL: Output Compare Timer Select bit
1 = Timer3 is the clock source for this OCMP module
0 = Timer2 is the clock source for this OCMP module
bit 2-0
OCM<2:0>: Output Compare Mode Select bits
111 = PWM mode on OCx; Fault pin enabled
110 = PWM mode on OCx; Fault pin disabled
101 = Initialize OCx pin low; generate continuous output pulses on OCx pin
100 = Initialize OCx pin low; generate single output pulse on OCx pin
011 = Compare event toggles OCx pin
010 = Initialize OCx pin high; compare event forces OCx pin low
001 = Initialize OCx pin low; compare event forces OCx pin high
000 = Output compare peripheral is disabled but continues to draw current
Note 1: When using 1:1 PBCLK divisor, the user’s software should not read/write the peripheral’s SFRs in the
SYSCLK cycle immediately following the instruction that clears the module’s ON bit.
2: This bit is only used when OCM<2:0> = ‘111’. It is read as ‘0’ in all other modes.
DS61168D-page 164
Preliminary
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