PIC32MX1XX Datasheet, PDF (68/320 Pages) Microchip Technology – 32-bit Microcontrollers (up to 128 KB Flash and 32 KB SRAM) with Audio and Graphics Interfaces, USB, and Advanced Analog

TABLE 4-24: PARALLEL MASTER PORT REGISTER MAP⁽¹⁾
Bits
31/15 30/14 29/13 28/12 27/11 26/10
25/9
24/8
23/7
22/6
21/5
20/4
19/3
18/2
17/1
16/0
31:16 —
7000 PMCON
15:0 ON
—
—
—
—
—
—
—
—
—
—
—
—
—
—
— 0000
—
SIDL
ADRMUX<1:0> PMPTTL PTWREN PTRDEN
CSF<1:0>
ALP
—
CS1P
—
WRSP RDSP 0000
31:16 —
7010 PMMODE
—
—
—
—
—
—
—
—
—
—
—
—
—
—
— 0000
15:0 BUSY
IRQM<1:0>
INCM<1:0>
—
MODE<1:0>
WAITB<1:0>
WAITM<3:0>
WAITE<1:0> 0000
31:16 —
—
—
—
—
—
—
—
—
—
—
—
—
—
—
— 0000
7020 PMADDR
15:0 —
CS1
—
—
—
ADDR<10:0>
0000
31:16
7030 PMDOUT
15:0
DATAOUT<31:0>
0000
0000
31:16
7040 PMDIN
15:0
DATAIN<31:0>
0000
0000
31:16 —
—
—
—
—
—
—
—
—
—
—
—
—
—
—
— 0000
7050 PMAEN
15:0 —
PTEN14
—
—
—
PTEN<10:0>
0000
31:16 —
—
—
7060 PMSTAT
15:0 IBF
IBOV
—
—
—
—
—
—
—
—
—
—
IB3F
IB2F
IB1F
IB0F
OBE
OBUF
—
—
—
—
—
— 0000
—
OB3E OB2E OB1E OB0E 008F
Legend: x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Note 1:
All registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See Section 11.2 “CLR, SET and INV Registers” for
more information.