PIC32MX1XX Datasheet, PDF (180/320 Pages) Microchip Technology – 32-bit Microcontrollers (up to 128 KB Flash and 32 KB SRAM) with Audio and Graphics Interfaces, USB, and Advanced Analog

PIC32MX1XX/2XX
REGISTER 18-1: UxMODE: UARTx MODE REGISTER
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Range 31/23/15/7 30/22/14/6 29/21/13/5 28/20/12/4 27/19/11/3 26/18/10/2 25/17/9/1 24/16/8/0
31:24
23:16
15:8
7:0
U-0
—
U-0
—
R/W-0
ON⁽¹⁾
R/W-0
WAKE
U-0
—
U-0
—
U-0
—
R/W-0
LPBACK
U-0
—
U-0
—
R/W-0
SIDL
R/W-0
ABAUD
U-0
—
U-0
—
R/W-0
IREN
R/W-0
RXINV
U-0
—
U-0
—
R/W-0
RTSMD
R/W-0
BRGH
U-0
U-0
U-0
—
—
—
U-0
U-0
U-0
—
—
—
U-0
R/W-0
R/W-0
—
UEN<1:0>
R/W-0
R/W-0
R/W-0
PDSEL<1:0>
STSEL
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 31-16 Unimplemented: Read as ‘0’
bit 15 ON: UARTx Enable bit⁽¹⁾
1 = UARTx is enabled. UARTx pins are controlled by UARTx as defined by UEN<1:0> and UTXEN
control bits
0 = UARTx is disabled. All UARTx pins are controlled by corresponding bits in the PORTx, TRISx and LATx
registers; UARTx power consumption is minimal
bit 14 Unimplemented: Read as ‘0’
bit 13
bit 12
bit 11
bit 10
bit 9-8
bit 7
bit 6
SIDL: Stop in Idle Mode bit
1 = Discontinue operation when device enters Idle mode
0 = Continue operation in Idle mode
IREN: IrDA Encoder and Decoder Enable bit
1 = IrDA is enabled
0 = IrDA is disabled
RTSMD: Mode Selection for UxRTS Pin bit
1 = UxRTS pin is in Simplex mode
0 = UxRTS pin is in Flow Control mode
Unimplemented: Read as ‘0’
UEN<1:0>: UARTx Enable bits
11 = UxTX, UxRX and UxBCLK pins are enabled and used; UxCTS pin is controlled by corresponding bits
in the PORTx register
10 = UxTX, UxRX, UxCTS and UxRTS pins are enabled and used
01 = UxTX, UxRX and UxRTS pins are enabled and used; UxCTS pin is controlled by corresponding bits
in the PORTx register
00 = UxTX and UxRX pins are enabled and used; UxCTS and UxRTS/UxBCLK pins are controlled by
corresponding bits in the PORTx register
WAKE: Enable Wake-up on Start bit Detect During Sleep Mode bit
1 = Wake-up enabled
0 = Wake-up disabled
LPBACK: UARTx Loopback Mode Select bit
1 = Loopback mode is enabled
0 = Loopback mode is disabled
Note 1: When using 1:1 PBCLK divisor, the user software should not read/write the peripheral SFRs in the
SYSCLK cycle immediately following the instruction that clears the module’s ON bit.
DS61168D-page 180
Preliminary
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