PIC32MX1XX Datasheet, PDF (46/320 Pages) Microchip Technology – 32-bit Microcontrollers (up to 128 KB Flash and 32 KB SRAM) with Audio and Graphics Interfaces, USB, and Advanced Analog

TABLE 4-4: INPUT CAPTURE 1-INPUT CAPTURE 5 REGISTER MAP
Bits
31/15
30/14
29/13
28/12
27/11
26/10
25/9
24/8
23/7
22/6
21/5
20/4
19/3
18/2
17/1
16/0
2000 IC1CON^{(1) 31:16}
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
— 0000
15:0 ON
—
SIDL
—
—
—
FEDGE C32 ICTMR
ICI<1:0>
ICOV ICBNE
ICM<2:0>
0000
31:16
2010 IC1BUF
15:0
IC1BUF<31:0>
xxxx
xxxx
2200 IC2CON^{(1) 31:16}
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
— 0000
15:0 ON
—
SIDL
—
—
—
FEDGE C32 ICTMR
ICI<1:0>
ICOV ICBNE
ICM<2:0>
0000
31:16
2210 IC2BUF
15:0
IC2BUF<31:0>
xxxx
xxxx
2400 IC3CON^{(1) 31:16}
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
— 0000
15:0 ON
—
SIDL
—
—
—
FEDGE C32 ICTMR
ICI<1:0>
ICOV ICBNE
ICM<2:0>
0000
31:16
2410 IC3BUF
15:0
IC3BUF<31:0>
xxxx
xxxx
2600 IC4CON^{(1) 31:16}
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
— 0000
15:0 ON
—
SIDL
—
—
—
FEDGE C32 ICTMR
ICI<1:0>
ICOV ICBNE
ICM<2:0>
0000
31:16
2610 IC4BUF
15:0
IC4BUF<31:0>
xxxx
xxxx
2800 IC5CON^{(1) 31:16}
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
— 0000
15:0 ON
—
SIDL
—
—
—
FEDGE C32 ICTMR
ICI<1:0>
ICOV ICBNE
ICM<2:0>
0000
31:16
2810 IC5BUF
15:0
IC5BUF<31:0>
xxxx
xxxx
Legend: x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Note 1: This register has corresponding CLR, SET and INV registers at its virtual address, plus an offset of 0x4, 0x8 and 0xC, respectively. See Section 11.2 “CLR, SET and INV Registers” for more information.