PIC32MX1XX Datasheet, PDF (129/320 Pages) Microchip Technology – 32-bit Microcontrollers (up to 128 KB Flash and 32 KB SRAM) with Audio and Graphics Interfaces, USB, and Advanced Analog

PIC32MX1XX/2XX
REGISTER 10-6: U1IR: USB INTERRUPT REGISTER (CONTINUED)
bit 0 URSTIF: USB Reset Interrupt bit (Device mode)⁽⁵⁾
1 = Valid USB Reset has occurred
0 = No USB Reset has occurred
DETACHIF: USB Detach Interrupt bit (Host mode)⁽⁶⁾
1 = Peripheral detachment was detected by the USB module
0 = Peripheral detachment was not detected
Note 1:
2:
3:
4:
5:
6:
This bit is valid only if the HOSTEN bit is set (see Register 10-11), there is no activity on the USB for
2.5 µs, and the current bus state is not SE0.
When not in Suspend mode, this interrupt should be disabled.
Clearing this bit will cause the STAT FIFO to advance.
Only error conditions enabled through the U1EIE register will set this bit.
Device mode.
Host mode.
© 2011-2012 Microchip Technology Inc.
Preliminary
DS61168D-page 129