MRF39RA Datasheet, PDF (8/72 Pages) Microchip Technology – Low-Power, Integrated UHF Receiver

MRF39RA
2.4.2 AUTOMATIC GAIN CONTROL
By default (LnaGainSelect = 000) the LNA gain is
controlled by a digital AGC loop to obtain the optimal
sensitivity/linearity trade-off.
Regardless of the Data Transfer mode (Packet or
Continuous), the following series of events takes place
when the receiver is enabled:
• The receiver stays in Wait mode, until RssiValue
exceeds RssiThreshold for two consecutive
samples. Its power consumption is the receiver
power consumption.
• When this condition is satisfied, the receiver
automatically selects the most suitable LNA gain,
optimizing the sensitivity/linearity trade-off.
• The programmed LNA gain, read-accessible with
LnaCurrentGain in RegLna, is carried on for the
whole duration of the packet, until one of the
following conditions is fulfilled:
• Packet mode: if AutoRxRestartOn = 0, the LNA
gain remains the same for the reception of the
following packet. If AutoRxRestartOn = 1, after
the controller has emptied the FIFO the receiver
re-enters the Wait mode, after a delay of
InterPacketRxDelay, enabling for the distant
transmitter to ramp down, hence avoiding a false
RSSI detection. In both cases (AutoRxRestartOn
= 0 or AutoRxRestartOn = 1), the receiver can
also re-enter the Wait mode by setting RestartRx
bit to ‘1’. The user can decide to do this to
manually launch a new AGC procedure.
• Continuous mode: upon reception of valid data,
the user can decide to either leave the receiver
enabled with the same LNA gain, or to restart the
procedure, by setting RestartRx bit to ‘1’,
resuming the Wait mode of the receiver,
described above.
Figure 2-3 illustrates the AGC behavior.
FIGURE 2-3:
AGC THRESHOLDS SETTINGS
Note 1: The AGC procedure must be performed
while receiving preamble in FSK mode.
2: In OOK mode, the AGC gives better
results if performed while receiving a
constant ‘1’ sequence.
Towards
-125 dBm
AGC ^Reference
16 dB
AgcThresh1
AgcThresh2
7 dB
11 dB
AgcThresh3
9 dB
AgcThresh4
11 dB
AgcThresh5
Pin (dBm)
G1
G2
G3
G4
G5
G6
Higher Sensitivity
Lower Linearity
Lower Noise Figure
Lower Sensitivity
Higher Linearity
Higher Noise Figure
DS40001778B-page 8
 2015 Microchip Technology Inc.