MRF39RA Datasheet, PDF (52/72 Pages) Microchip Technology – Low-Power, Integrated UHF Receiver

MRF39RA
TABLE 5-5: PACKET ENGINE REGISTERS (CONTINUED)
Name
(Address)
Bits
Variable Name
Mode
Default
Value
Description
RegPacketConfig1
7 PacketFormat
rw
(0x37)
6-5 DcFree
rw
4 CrcOn
rw
3 CrcAutoClearOff
rw
2-1 AddressFiltering
rw
0—
rw
RegPayloadLength 7-0 PayloadLength
rw
(0x38)
RegNodeAdrs
7-0 NodeAddress
rw
(0x39)
RegBroadcastAdrs 7-0 BroadcastAddress
rw
(0x3A)
0
00
1
0
00
0
0x40
0x00
Defines the packet format used:
0  Fixed length
1  Variable length
Defines DC-free decoding performed:
00  None (OFF)
01  Manchester
10  Whitening
11  Reserved
Enables CRC check:
0  OFF
1  ON
Defines the behavior of the packet handler when
CRC check fails:
0  Clear FIFO and restart new packet
reception. No PayloadReady interrupt
issued.
1  Do not clear FIFO. PayloadReady interrupt
issued.
Defines address based filtering in Rx:
00  None (OFF)
01  Address field must match NodeAddress
10  Must match NodeAddress or
BroadcastAddress
11  Reserved
Unused
If PacketFormat = 0 (fixed), payload length
If PacketFormat = 1 (variable), max length in Rx
Node address used in address filtering.
0x00 Broadcast address used in address filtering.
DS40001778B-page 52
 2015 Microchip Technology Inc.