MRF39RA Datasheet, PDF (18/72 Pages) Microchip Technology – Low-Power, Integrated UHF Receiver

MRF39RA
2.4.16
AUTOMATIC FREQUENCY
CORRECTION
The AFC is based on the FEI block and, therefore, the
same input signal and receiver setting conditions apply.
When the AFC procedure is done, AfcValue is directly
subtracted to the register that defines the frequency of
operation of the chip, FRF. The AFC can be launched
in the following cases:
• Each time the receiver is enabled, if
AfcAutoOn = 1
• Upon user request, by setting bit AfcStart in
RegAfcFei, if AfcAutoOn = 0
When the AFC is automatically triggered
(AfcAutoOn = 1), the user has the option to:
• Clear the former AFC correction value, if
AfcAutoClearOn = 1
• Start the AFC evaluation from the previously
corrected frequency. This may be useful in
systems in which the LO keeps on drifting in the
same direction. Aging compensation is a good
example.
The MRF39RA offers an alternate receiver bandwidth
setting during the AFC phase to accommodate large
LO drifts. If the user considers that the received signal
may be out of the receiver bandwidth, a higher channel
filter bandwidth can be programmed in RegAfcBw, at
the expense of the receiver noise floor, which produces
impact upon sensitivity.
2.4.17
OPTIMIZED SETUP FOR LOW
MODULATION INDEX SYSTEMS
For wide band systems, where AFC is usually not
required (XTAL inaccuracies do not typically impact the
sensitivity), it is recommended to offset the LO
frequency of the receiver to avoid desensitization. This
can be simply done by modifying Frf in RegFrfLsb. A
good rule of thumb is to offset the receiver’s LO by 10%
of the expected transmitter frequency deviation.
For narrow band systems, it is recommended to
perform AFC. The MRF39RA has a dedicated AFC,
enabled when AfcLowBetaOn in RegAfcCtrl is set to
‘1’. A frequency offset, programmable through
LowBetaAfcOffset in RegTestAfc, is added and is
calculated as shown in Equation 2-10.
EQUATION 2-10: FREQUENCY OFFSET
Offset = LowBetaAFCOffset  488 Hz
The user must ensure that the programmed offset
exceeds the DC canceler’s cutoff frequency, set
through DccFreqAfc in RegAfcBw.
FIGURE 2-10:
OPTIMIZED AFC (Afc
LowBetaOn = 1)
RX
TX
RX & TX
FeiValue
Standard AFC
AfcLowBetaOn = 0
f
AfcValue
f
RX
TX
FeiValue
Before AFC
Optimized AFC
AfcLowBetaOn = 1
f
TX RX
AfcValue
LowBetaAfcOffset
f
After AFC
As shown in Figure 2-10, a standard AFC sequence
uses the result of the FEI to correct the LO frequency
and align both local oscillators. When the optimized
AFC is enabled (AfcLowBetaOn = 1), the receiver’s LO
is corrected by FeiValue + LowBetaAfcOffset.
When the optimized AFC routine is enabled, the
receiver start-up time can be computed as shown in
Equation 2-11, see Section 3.2.1 “Receiver Start-up
Time”.
EQUATION 2-11: RECEIVER START-UP
TIME
TS_RE_AGC&AFC optimized AFC =
= TANA + 4.TCF + 4.TDCC + 3.TRSSI + 2.TAFC + 2.TPLLAFC
DS40001778B-page 18
 2015 Microchip Technology Inc.