MRF39RA Datasheet, PDF (45/72 Pages) Microchip Technology – Low-Power, Integrated UHF Receiver

MRF39RA
TABLE 5-2:
Name
(Address)
RegListen1
(0x0D)
RegListen2
(0x0E)
COMMON CONFIGURATION REGISTERS (CONTINUED)
Bits
Variable Name
Mode
Default
Value
Description
7-6 ListenResolIdle rw
10 Resolution of Listen modes timings (calibrated RC
osc):
0101  64 µs
1010  4.1 ms
1111  262 ms
Others  Reserved
5-4 ListenResolRx
rw
01 Resolution of Listen mode Rx time (calibrated RC
osc):
00  Reserved
01  64 µs
10  4.1 ms
11  262 ms
3 ListenCriteria
rw
0 Criteria for packet acceptance in Listen mode:
0  Signal strength is above RssiThreshold
1  Signal strength is above RssiThreshold and
SyncAddress matched
2-1 ListenEnd
rw
01 Action taken after acceptance of a packet in Listen
mode:
00  Chip stays in Rx mode. Listen mode stops
and must be disabled, see Section 3.3 “Lis-
ten Mode”.
01  Chip stays in Rx mode until PayloadReady or
Time-out interrupt occurs. It then goes to the
mode defined by Mode. Listen mode stops
and must be disabled, see Section 3.3 “Lis-
ten Mode”.
10  Chip stays in Rx mode until PayloadReady or
Time-out interrupt occurs. Listen mode then
resumes in idle state. FIFO content is lost at
next Rx wake-up.
11  Reserved
0—
r
0 Unused
7-0 ListenCoefIdle
rw 0xf5 Duration of the Idle phase in Listen mode.
t_ListenIdle = ListenCoefIdle  ListenResolIdle
RegListen3
(0x0F)
7-0 ListenCoefRx
rw 0x20 Duration of the Rx phase in Listen mode; start-up time
included, see Section 3.2.1 “Receiver Start-up
Time”.
t_ListenRx = ListenCoefRx  ListenResolRx
RegVersion
(0x10)
7-0 Version
r
0x23 Version code of the chip. Bits 7-4 give the full revision
number. Bits 3-0 give the metal mask revision number.
 2015 Microchip Technology Inc.
DS40001778B-page 45