MRF39RA Datasheet, PDF (5/72 Pages) Microchip Technology – Low-Power, Integrated UHF Receiver

2.0 DEVICE DESCRIPTION
This section describes in detail the architecture of the
MRF39RA low-power, highly integrated receiver.
2.1 Power Supply Strategy
The MRF39RA employs an advanced power supply
scheme, which provides stable operating
characteristics over the full temperature and voltage
range of operation.
The MRF39RA can be powered from any low-noise
voltage source via pins VBAT1 and VBAT2. As
suggested in the reference design, decoupling
capacitors must be connected on VR_DIG and
VR_ANA pins to ensure a correct operation of the
built-in voltage regulators.
2.2 Low Battery Detector
A low battery detector is also included enabling the
generation of an interrupt signal in response to passing
a programmable threshold adjustable through the
RegLowBat register. The interrupt signal can be
mapped to any of the DIO pins through the
programming of RegDioMapping.
2.3 Frequency Synthesis
The LO generation on the MRF39RA is based on a
state-of-the-art fractional-N PLL. The PLL is fully
integrated with automatic calibration.
2.3.1 REFERENCE OSCILLATOR
The crystal oscillator is the main timing reference of the
MRF39RA. It is used as a reference for the frequency
synthesizer and as a clock for the digital processing.
The XO start-up time, TS_OSC, depends on the actual
XTAL being connected on pins XTA and XTB. When
using the built-in sequencer, the MRF39RA optimizes
the start-up time and automatically triggers the PLL
when the XO signal is stable. To manually control the
start-up time, the user must either wait for TS_OSC
max, or monitor the signal CLKOUT, which is only
made available on the output buffer when a stable XO
oscillation is achieved.
An external clock can be used to replace the crystal
oscillator, for instance a tight tolerance TCXO. To do
this, bit 4 at address 0x59 must be set to ‘1’, and the
external clock has to be provided on XTA (pin 4). XTB
(pin 5) must be left open. The peak-peak amplitude of
the input signal must never exceed 1.8V. Consult the
TCXO supplier for an appropriate value of decoupling
capacitor, CD. Figure 2-1 shows the TCXO connection.
MRF39RA
FIGURE 2-1:
TCXO CONNECTION
MRF39RA
XTA XTB
TCXO
32 MHZ
NC
OP
VCC
GND
VCC
C_D
2.3.2 CLKOUT OUTPUT
The reference frequency, or a fraction of it, can be
provided on DIO5 (pin 12) by modifying bits ClkOut in
RegDioMapping2. Two typical applications of the
CLKOUT output include:
• Providing a clock output for a companion
processor, thus saving the cost of an additional
oscillator; CLKOUT can be made available in any
operation mode except Sleep mode and is
automatically enabled at Power-on Reset
• Providing an oscillator reference output;
measurement of the CLKOUT signal enables
simple software trimming of the initial crystal
tolerance.
Note:
To minimize the current consumption of
the MRF39RA, ensure that the CLKOUT
signal is disabled when not required.
 2015 Microchip Technology Inc.
DS40001778B-page 5