MRF39RA Datasheet, PDF (42/72 Pages) Microchip Technology – Low-Power, Integrated UHF Receiver

MRF39RA
TABLE 5-1: REGISTERS SUMMARY (CONTINUED)
Address Register Name
Reset
Default
(Built-in) (Recommended)
Description
0x27
RegIrqFlags1
0x28
0x29
0x2A
RegIrqFlags2
RegRssiThresh
RegRxTimeout1
0x2B
0x2C
0x2D
0x2E
0x2F
-
0x36
0x37
0x38
0x39
0x3A
0x3B
0x3C
0x3D
0x3E
-
0x4D
0x4E
0x4F
0x58
0x59
0x5F
0x6F
0x71
0x50 +
RegRxTimeout2
Reserved2C
Reserved2D
RegSyncConfig
RegSyncValue1-8
RegPacketConfig1
RegPayloadLength
RegNodeAdrs
RegBroadcastAdrs
RegAutoModes
RegFifoThresh
RegPacketConfig2
RegAesKey1-16
RegTemp1
RegTemp2
RegTestLna
RegTestTcxo
RegTestllBw
RegTestDagc
RegTestAfc
RegTest
0x80
0xFF
0x00
0xE4
0x00
0x00
0x00
0x03
0x98
0x00
0x01
0x0F
0x10
0x40
0x00
0x00
0x00
0x8F
0x02
0x00
0x00
0x01
0x00
0x1B
0x09
0x08
0x30
0x00
—
Status register: PLL lock state, time out,
RSSI > Threshold
Status register: FIFO handling flags, low battery
detection
RSSI threshold control
Time-out duration between Rx request and RSSI
detection
Time-out duration between RSSI detection and
PayloadReady
—
—
Sync word recognition control
Sync word bytes, 1 through 8
Packet mode settings
Payload length setting
Node address
Broadcast address
Auto modes settings
FIFO threshold
Packet mode settings
16 bytes of the cypher key
Temperature Sensor control
Temperature readout
Sensitivity boost
XTAL or TCXO input selection
PLL bandwidth setting
Fading margin Improvement
AFC offset for low modulation index AFC
Internal test registers
Note 1: Reset values are automatically refreshed
in the chip at Power-on Reset.
2: Default values are the Microchip
recommended register values, optimizing
the device operation.
3: Registers for which the default value
differs from the Reset value are denoted
by an * in the tables of Section 5.0
“Configuration and Status Registers”.
DS40001778B-page 42
 2015 Microchip Technology Inc.