MRF39RA Datasheet, PDF (57/72 Pages) Microchip Technology – Low-Power, Integrated UHF Receiver

MRF39RA
6.2.2 MANUAL RESET
A manual Reset of the MRF39RA is possible even for
applications in which VDD cannot be physically
disconnected. Pin 6 must be pulled high for 100 µs and
then released. The user must wait for 5 ms before
using the chip.
FIGURE 6-2:
MANUAL RESET TIMING DIAGRAM
VDD
Pin 6
(Input)
> 100 us
High-Z
’1’
Wait for
5 ms
H igh -Z
Chip is ready from
this point on
Note:
While pin 6 is driven high, an overcurrent
consumption of up to 10 mA can be seen
on VDD.
6.3 Reference Design
Contact the Microchip representative for evaluation
tools, reference designs and design assistance. Note
that all schematics shown in this section are full
schematics, listing all required components, including
decoupling capacitors.
FIGURE 6-3:
APPLICATION SCHEMATIC
J1
RF_IN
GND
VCC VCC
C3
C8
0.1uF
0.1uF
C2
C1
L1
GND
GND
GND
C6
GND
Q1
21 _RFIN
SCK ¹⁵
MISO ¹⁶
MOSI ¹⁷
CS ¹⁸
3
1
4 _XTA
5 _XTB
RESET ⁶
C7
DIO0 ⁷
U1
MRF39RA
DIO1
DIO2
DIO3
8
9
10
GND
DIO4 ¹¹
DIO5 ¹²
2 _{VR_ANA}
3 _{VR_DIG}
NC ¹⁹
C4
C5
0.1uF
0.1uF
NC ²³
NC ²⁴
GND
GND
GND
SCK
MISO
MOSI
CS
DIO0
DIO1
DIO2
DIO3
DIO4
DIO5
SPI
RESET
DIO
 2015 Microchip Technology Inc.
DS40001778B-page 57