PIC24FJ256GA110_10 Datasheet, PDF (50/330 Pages) Microchip Technology – 64/80/100-Pin, 16-Bit, General Purpose Flash Microcontrollers with Peripheral Pin Select

TABLE 4-22: PARALLEL MASTER/SLAVE PORT REGISTER MAP
File
Name
Addr Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
All
Resets
PMCON 0600 PMPEN
—
PSIDL ADRMUX1 ADRMUX0 PTBEEN PTWREN PTRDEN CSF1
CSF0
ALP
PMMODE 0602 BUSY IRQM1 IRQM0 INCM1
INCM0 MODE16 MODE1 MODE0 WAITB1 WAITB0 WAITM3
PMADDR 0604 CS2
CS1 ADDR13 ADDR12 ADDR11 ADDR10 ADDR9 ADDR8 ADDR7 ADDR6 ADDR5
PMDOUT1
Parallel Port Data Out Register 1 (Buffers 0 and 1)
PMDOUT2 0606
Parallel Port Data Out Register 2 (Buffers 2 and 3)
PMDIN1 0608
Parallel Port Data In Register 1 (Buffers 0 and 1)
PMDIN2 060A
Parallel Port Data In Register 2 (Buffers 2 and 3)
PMAEN 060C PTEN15 PTEN14 PTEN13 PTEN12 PTEN11 PTEN10 PTEN9 PTEN8 PTEN7 PTEN6 PTEN5
PMSTAT 060E IBF
IBOV
—
—
IB3F
IB2F
IB1F
IB0F
OBE
OBUF
—
Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
CS2P
WAITM2
ADDR4
PTEN4
—
CS1P
WAITM1
ADDR3
PTEN3
OB3E
BEP
WAITM0
ADDR2
PTEN2
OB2E
WRSP
WAITE1
ADDR1
PTEN1
OB1E
RDSP
WAITE0
ADDR0
PTEN0
OB0E
0000
0000
0000
0000
0000
0000
0000
0000
0000
TABLE 4-23: REAL-TIME CLOCK AND CALENDAR REGISTER MAP
File
Name
Addr Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
ALRMVAL 0620
Alarm Value Register Window Based on ALRMPTR<1:0>
ALCFGRPT 0622 ALRMEN CHIME AMASK3 AMASK2 AMASK1 AMASK0 ALRMPTR1 ALRMPTR0 ARPT7 ARPT6 ARPT5
RTCVAL 0624
RTCC Value Register Window Based on RTCPTR<1:0>
RCFGCAL 0626 RTCEN
—
RTCWREN RTCSYNC HALFSEC RTCOE RTCPTR1 RTCPTR0 CAL7
CAL6
CAL5
Legend:
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Bit 4
ARPT4
CAL4
Bit 3
ARPT3
CAL3
Bit 2
ARPT2
CAL2
Bit 1
ARPT1
CAL1
Bit 0
All
Resets
ARPT0
CAL0
xxxx
0000
xxxx
xxxx
TABLE 4-24: COMPARATORS REGISTER MAP
File
Name
Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10
CMSTAT
CVRCON
CM1CON
CM2CON
CM3CON
Legend:
0630 CMIDL
—
—
—
—
C3EVT
0632
—
—
—
—
—
—
0634
CEN
COE
CPOL
—
—
—
0636
CEN
COE
CPOL
—
—
—
0638
CEN
COE
CPOL
—
—
—
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Bit 9
C2EVT
—
CEVT
CEVT
CEVT
Bit 8
Bit 7
Bit 6
Bit 5
C1EVT
—
COUT
COUT
COUT
—
CVREN
EVPOL1
EVPOL1
EVPOL1
—
CVROE
EVPOL0
EVPOL0
EVPOL0
—
CVRR
—
—
—
Bit 4
—
CVRSS
CREF
CREF
CREF
Bit 3
—
CVR3
—
—
—
Bit 2
C3OUT
CVR2
—
—
—
Bit 1
C2OUT
CVR1
CCH1
CCH1
CCH1
Bit 0
All
Resets
C1OUT
CVR0
CCH0
CCH0
CCH0
0000
0000
0000
0000
0000
TABLE 4-25: CRC REGISTER MAP
File
Name
Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
CRCCON
CRCXOR
CRCDAT
CRCWDAT
Legend:
0640
—
—
CSIDL VWORD4 VWORD3 VWORD2 VWORD1 VWORD0 CRCFUL CRCMPT
0642
X15
X14
X13
X12
X11
X10
X9
X8
X7
X6
0644
CRC Data Input Register
0646
CRC Result Register
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Bit 5
—
X5
Bit 4
Bit 3
CRCGO PLEN3
X4
X3
Bit 2
PLEN2
X2
Bit 1
PLEN1
X1
Bit 0
PLEN0
—
All
Resets
0040
0000
0000
0000