PIC24FJ256GA110_10 Datasheet, PDF (18/330 Pages) Microchip Technology – 64/80/100-Pin, 16-Bit, General Purpose Flash Microcontrollers with Peripheral Pin Select

PIC24FJ256GA110 FAMILY
TABLE 1-4: PIC24FJ256GA110 FAMILY PINOUT DESCRIPTIONS (CONTINUED)
Function
Pin Number
64-Pin
TQFP, QFN
80-Pin
TQFP
100-Pin
TQFP
I/O
Input
Buffer
Description
CTED1
28
34
42
CTED2
27
33
41
CTPLS
29
35
43
CVREF
23
29
34
ENVREG
57
71
86
INT0
35
45
55
MCLR
7
9
13
OSCI
39
49
63
OSCO
40
50
64
PGEC1
15
19
24
PGED1
16
20
25
PGEC2
17
21
26
PGED2
18
22
27
PGEC3
11
15
20
PGED3
12
16
21
PMA0
30
36
44
PMA1
29
35
43
PMA2
PMA3
PMA4
PMA5
PMA6
PMA7
PMA8
PMA9
PMA10
PMA11
PMA12
PMA13
PMCS1
PMCS2
PMBE
PMD0
PMD1
PMD2
PMD3
PMD4
PMD5
PMD6
PMD7
PMRD
PMWR
Legend:
8
10
14
6
8
12
5
7
11
4
6
10
16
24
29
22
23
28
32
40
50
31
39
49
28
34
42
27
33
41
24
30
35
23
29
34
45
57
71
44
56
70
51
63
78
60
76
93
61
77
94
62
78
98
63
79
99
64
80
100
1
1
3
2
2
4
3
3
5
53
67
82
52
66
81
TTL = TTL input buffer
ANA = Analog level input/output
I
ANA CTMU External Edge Input 1.
I
ANA CTMU External Edge Input 2.
O
— CTMU Pulse Output.
O
— Comparator Voltage Reference Output.
I
ST Voltage Regulator Enable.
I
ST External Interrupt Input.
I
ST Master Clear (device Reset) Input. This line is brought low
to cause a Reset.
I
ANA Main Oscillator Input Connection.
O
ANA Main Oscillator Output Connection.
I/O
ST In-Circuit Debugger/Emulator/ICSP™ Programming Clock.
I/O
ST In-Circuit Debugger/Emulator/ICSP Programming Data.
I/O
ST In-Circuit Debugger/Emulator/ICSP Programming Clock.
I/O
ST In-Circuit Debugger/Emulator/ICSP Programming Data.
I/O
ST In-Circuit Debugger/Emulator/ICSP Programming Clock.
I/O
ST In-Circuit Debugger/Emulator/ICSP Programming Data.
I/O
ST Parallel Master Port Address Bit 0 Input (Buffered Slave
modes) and Output (Master modes).
I/O
ST Parallel Master Port Address Bit 1 Input (Buffered Slave
modes) and Output (Master modes).
O
— Parallel Master Port Address (Demultiplexed Master
O
— ^modes).
O
—
O
—
O
—
O
—
O
—
O
—
O
—
O
—
O
—
O
—
I/O ST/TTL Parallel Master Port Chip Select 1 Strobe/Address Bit 15.
O
ST Parallel Master Port Chip Select 2 Strobe/Address Bit 14.
O
— Parallel Master Port Byte Enable Strobe.
I/O ST/TTL Parallel Master Port Data (Demultiplexed Master mode) or
I/O ST/TTL ^{Address/Data (Multiplexed Master modes).}
I/O ST/TTL
I/O ST/TTL
I/O ST/TTL
I/O ST/TTL
I/O ST/TTL
I/O ST/TTL
O
— Parallel Master Port Read Strobe.
O
— Parallel Master Port Write Strobe.
ST = Schmitt Trigger input buffer
I²C™ = I²C/SMBus input buffer
DS39905E-page 18
 2010 Microchip Technology Inc.