PIC24FJ256GA110_10 Datasheet, PDF (273/330 Pages) Microchip Technology – 64/80/100-Pin, 16-Bit, General Purpose Flash Microcontrollers with Peripheral Pin Select

PIC24FJ256GA110 FAMILY
TABLE 28-4: DC CHARACTERISTICS: OPERATING CURRENT (IDD)
DC CHARACTERISTICS
Standard Operating Conditions: 2.0V to 3.6V (unless otherwise stated)
Operating temperature -40°C  TA  +85°C for Industrial
-40°C  TA  +125°C for Extended
Parameter No. Typical⁽¹⁾
Max
Units
Conditions
Operating Current (IDD): PMD Bits are Set⁽²⁾
DC20
0.83
1.2
mA
-40°C
DC20a
DC20b
0.83
1.2
mA
0.83
1.2
mA
+25°C
+85°C
2.0V⁽³⁾
DC20c
DC20d
0.9
1.3
mA
1.1
1.7
mA
+125°C
-40°C
1 MIPS
DC20e
DC20f
1.1
1.7
mA
1.1
1.7
mA
+25°C
+85°C
3.3V⁽⁴⁾
DC20g
1.2
1.7
mA
+125°C
DC23
3.3
4.5
mA
-40°C
DC23a
DC23b
3.3
4.5
mA
3.3
4.6
mA
+25°C
+85°C
2.0V⁽³⁾
DC23c
DC23d
3.4
4.6
mA
4.3
6.5
mA
+125°C
-40°C
4 MIPS
DC23e
DC23f
4.3
6.5
mA
4.3
6.5
mA
+25°C
+85°C
3.3V⁽⁴⁾
DC23g
4.3
6.5
mA
+125°C
DC24
18.2
24.0
mA
-40°C
DC24a
DC24b
18.2
24.0
mA
18.2
24.0
mA
+25°C
+85°C
2.5V⁽³⁾
DC24c
DC24d
18.2
24.0
mA
18.2
24.0
mA
+125°C
-40°C
16 MIPS
DC24e
DC24f
18.2
24.0
mA
18.2
24.0
mA
+25°C
+85°C
3.3V⁽⁴⁾
DC24g
18.2
24.0
mA
+125°C
DC31
15.0
54.0
A
-40°C
DC31a
DC31b
15.0
54.0
A
20.0
69.0
A
+25°C
+85°C
2.0V⁽³⁾
DC31c
DC31d
60.0
159.0
A
57.0
96.0
A
+125°C
-40°C
LPRC (31 kHz)
DC31e
DC31f
57.0
96.0
A
95.0
145.0
A
+25°C
+85°C
3.3V⁽⁴⁾
DC31g
120.0
281.0
A
+125°C
Note 1:
2:
3:
4:
Data in “Typical” column is at 3.3V, 25°C unless otherwise stated. Parameters are for design guidance only and
are not tested.
The supply current is mainly a function of the operating voltage and frequency. Other factors, such as I/O pin loading
and switching rate, oscillator type, internal code execution pattern and temperature, also have an impact on the
current consumption. The test conditions for all IDD measurements are as follows: OSCI driven with external square
wave from rail to rail. All I/O pins are configured as inputs and pulled to VDD.
MCLR = VDD; WDT and FSCM are disabled. CPU, SRAM, program memory and data memory are operational. No
peripheral modules are operating and all of the Peripheral Module Disable (PMD) bits are set.
On-chip voltage regulator disabled (ENVREG tied to VSS).
On-chip voltage regulator enabled (ENVREG tied to VDD).
 2010 Microchip Technology Inc.
DS39905E-page 273