PIC24FJ256GA110_10 Datasheet, PDF (182/330 Pages) Microchip Technology – 64/80/100-Pin, 16-Bit, General Purpose Flash Microcontrollers with Peripheral Pin Select

PIC24FJ256GA110 FAMILY
FIGURE 15-3:
SPI MASTER/SLAVE CONNECTION (STANDARD MODE)
PROCESSOR 1 (SPI Master)
PROCESSOR 2 (SPI Slave)
SDOx
Serial Receive Buffer
(SPIxRXB)
SDIx
Serial Receive Buffer
(SPIxRXB)
Shift Register
(SPIxSR)
MSb
LSb
SDIx
Serial Transmit Buffer
(SPIxTXB)
SDOx
Shift Register
(SPIxSR)
MSb
LSb
Serial Transmit Buffer
(SPIxTXB)
SPIx Buffer
(SPIxBUF)⁽²⁾
SCKx ^{Serial Clock}
SCKx
SSx⁽¹⁾
SPIx Buffer
(SPIxBUF)⁽²⁾
MSTEN (SPIxCON1<5>) = 1)
SSEN (SPIxCON1<7>) = 1 and MSTEN (SPIxCON1<5>) = 0
Note 1: Using the SSx pin in Slave mode of operation is optional.
2: User must write transmit data to read received data from SPIxBUF. The SPIxTXB and SPIxRXB registers are memory
mapped to SPIxBUF.
FIGURE 15-4:
SPI MASTER/SLAVE CONNECTION (ENHANCED BUFFER MODES)
PROCESSOR 1 (SPI Enhanced Buffer Master)
SDOx
Shift Register
(SPIxSR)
MSb
LSb
SDIx
PROCESSOR 2 (SPI Enhanced Buffer Slave)
SDIx
SDOx
Shift Register
(SPIxSR)
MSb
LSb
8-Level FIFO Buffer
8-Level FIFO Buffer
SPIx Buffer
(SPIxBUF)⁽²⁾
Serial Clock
SCKx
SCKx
SSx
SSx⁽¹⁾
SPIx Buffer
(SPIxBUF)⁽²⁾
MSTEN (SPIxCON1<5>) = 1 and
SPIBEN (SPIxCON2<0>) = 1
SSEN (SPIxCON1<7>) = 1,
MSTEN (SPIxCON1<5>) = 0 and
SPIBEN (SPIxCON2<0>) = 1
Note 1: Using the SSx pin in Slave mode of operation is optional.
2: User must write transmit data to read received data from SPIxBUF. The SPIxTXB and SPIxRXB registers are memory
mapped to SPIxBUF.
DS39905E-page 182
 2010 Microchip Technology Inc.