PIC24FJ256GA110_10 Datasheet, PDF (169/330 Pages) Microchip Technology – 64/80/100-Pin, 16-Bit, General Purpose Flash Microcontrollers with Peripheral Pin Select

PIC24FJ256GA110 FAMILY
For 32-bit cascaded operation, these steps are also
necessary:
1. Set the OC32 bits for both registers
(OCyCON2<8> and (OCxCON2<8>). Enable
the even-numbered module first to ensure the
modules will start functioning in unison.
2. Clear the OCTRIG bit of the even module
(OCyCON2<7>), so the module will run in
Synchronous mode.
3. Configure the desired output and Fault settings
for OCyCON2.
4. Force the output pin for OCx to the output state
by clearing the OCTRIS bit.
5. If Trigger mode operation is required, configure
the trigger options in OCx by using the OCTRIG
(OCxCON2<7>), TRIGSTAT (OCxCON2<6>)
and SYNCSEL (OCxCON2<4:0>) bits.
6. Configure the desired Compare or PWM mode
of operation (OCM<2:0>) for OCyCON1 first,
then for OCxCON1.
Depending on the output mode selected, the module
holds the OCx pin in its default state and forces a tran-
sition to the opposite state when OCxR matches the
timer. In Double Compare modes, OCx is forced back
to its default state when a match with OCxRS occurs.
The OCxIF interrupt flag is set after an OCxR match in
Single Compare modes, and after each OCxRS match
in Double Compare modes.
Single-shot pulse events only occur once, but may be
repeated by simply rewriting the value of the
OCxCON1 register. Continuous pulse events continue
indefinitely until terminated.
14.3 Pulse-Width Modulation (PWM)
Mode
In PWM mode, the enhanced output compare module
can be configured for edge-aligned or center-aligned
pulse waveform generation. All PWM operations are
double-buffered (buffer registers are internal to the
module and are not mapped into SFR space).
To set up the module for PWM operations:
1. Configure the OCx output for one of the
available Peripheral Pin Select pins.
2. Calculate the desired duty cycles and load them
into the OCxR register.
3. Calculate the desired period and load it into the
OCxRS register.
4. Select the current OCx as the synchronization
source by writing 0x1F to SYNCSEL<4:0>
(OCxCON2<4:0>) and clearing OCTRIG
(OCxCON2<7>).
5. Select a clock source by writing to the
OCTSEL2<2:0> (OCxCON<12:10>) bits.
6. Enable interrupts, if required, for the timer and
output compare modules. The output compare
interrupt is required for PWM Fault pin utilization.
7. Select the desired PWM mode in the OCM<2:0>
(OCxCON1<2:0>) bits.
8. If a timer is selected as a clock source, set the
TMRy prescale value and enable the time base
by setting the TON (TxCON<15>) bit.
Note:
This peripheral contains input and output
functions that may need to be configured
by the Peripheral Pin Select. See
Section 10.4 “Peripheral Pin Select” for
more information.
 2010 Microchip Technology Inc.
DS39905E-page 169