PIC24FJ256GA110_10 Datasheet, PDF (319/330 Pages) Microchip Technology – 64/80/100-Pin, 16-Bit, General Purpose Flash Microcontrollers with Peripheral Pin Select

PIC24FJ256GA110 FAMILY
APPENDIX A: REVISION HISTORY
Revision A (December 2007)
Original data sheet for the PIC24FJ256GA110 family of
devices.
Revision B (February 2008)
Updates to Section 28.0 “Electrical Characteristics”
and minor edits to text throughout document.
Revision C (April 2009)
Updates to all Pin Diagrams to reflect the correct order
of priority for multiplexed peripherals and adds the
ASCK1 pin function.
Adds packaging information for the new 64-pin QFN
package to Section 29.0 “Packaging Information”
and the Product Information System.
Updates Section 5.0 “Flash Program Memory” with
revised code examples in assembler and new code
examples in C.
Updates Section 6.2 “Device Reset Times” with
revised information, particularly Table 6-3.
Adds the INTTREG register to Section 4.0 “Memory
Organization” and Section 7.0 “Interrupt Controller”.
Makes several additions and changes to Section 10.0
“I/O Ports”, including:
• revision of Section 10.4.2.1 “Peripheral Pin
Select Function Priority”
• addition of Section 10.4.3.3 “Alternate Fixed
Pin Mapping”
• revisions to Table 10-3, “Selectable Output
Sources”
• addition of the ALTRP register (and in Section 4.0
“Memory Organization”)
Updates Section 15.0 “Serial Peripheral Interface
(SPI)” to include references to the ASCK1 pin function.
Updates Section 20.0 “Programmable Cyclic
Redundancy Check (CRC) Generator” with new
illustrations and a revised Section 20.1 “User
Interface”.
Updates Section 21.0 “10-Bit High-Speed A/D Con-
verter” by changing all references to AD1CHS0 to
AD1CHS (as well as other locations in the document).
Also revises bit field descriptions in registers:
AD1CON3 (bits 7:0) and AD1CHS (bits 12:8).
Makes minor text edits to bit descriptions in
Section 22.0 “Triple Comparator Module”
(Register 22-1) and Section 24.0 “Charge Time
Measurement Unit (CTMU)” (Register 24-1).
Updates Section 25.2 “On-Chip Voltage Regulator”
with revised text on the operation of the regulator
during POR and Standby mode.
Updates Section 25.5 “JTAG Interface” to remove
references to programming via the interface.
Makes multiple additions and changes to Section 28.0
“Electrical Characteristics”, including:
• DC current characteristics for extended
temperature operation (125°C)
• New DC characteristics of VBOR, VBG, TBG and
ICNPD
• Addition of new VPEW specification for VDDCORE
• New AC characteristics for internal oscillator
start-up time (TLPRC)
• Combination of all Internal RC Accuracy
information into a single table
Makes other minor typographic corrections throughout
the text.
Revision D (December 2009)
Updates Section 2.0 “Guidelines for Getting Started
with 16-bit Microcontrollers” with the most current
version.
Corrects annotations to the CN70 pin function in
Table 4-4 of Section 4.2.4 “SFR Space”.
Corrects annotations to remappable output function 30
in Register 10-37 of Section 10.4 “Peripheral Pin
Select”.
Corrects the definitions for the WPEND and
WPFP<7:0> Configuration bits in Register 25-3 of
Section 25.1 “Configuration Bits”.
Updates Section 28.0 “Electrical Characteristics”
with additional data for IDD at 60°C. Also corrects
occurrences of “DISVREG” throughout the chapter,
replacing them with “ENVREG” and the proper
VDD/VSS connection information.
Makes other minor typographic corrections throughout
the text.
Revision E (November 2010)
Updated Section 2.0 “Guidelines for Getting Started
with 16-bit Microcontrollers” with the most current
version.
Updates to Section 28.0 “Electrical Characteristics”
with tables being added and replaced from the FRM
chapters.
 2010 Microchip Technology Inc.
DS39905E-page 319