PIC24FJ256GA110_10 Datasheet, PDF (214/330 Pages) Microchip Technology – 64/80/100-Pin, 16-Bit, General Purpose Flash Microcontrollers with Peripheral Pin Select

PIC24FJ256GA110 FAMILY
REGISTER 19-1: RCFGCAL: RTCC CALIBRATION AND CONFIGURATION REGISTER⁽¹⁾ (CONTINUED)
bit 7-0
CAL<7:0>: RTC Drift Calibration bits
01111111 = Maximum positive adjustment; adds 508 RTC clock pulses every one minute
...
00000001 =
00000000 =
11111111 =
...
Minimum positive adjustment; adds 4 RTC clock pulses every one minute
No adjustment
Minimum negative adjustment; subtracts 4 RTC clock pulses every one minute
10000000 = Maximum negative adjustment; subtracts 512 RTC clock pulses every one minute
Note 1:
2:
3:
The RCFGCAL register is only affected by a POR.
A write to the RTCEN bit is only allowed when RTCWREN = 1.
This bit is read-only; it is cleared to ‘0’ on a write to the lower half of the MINSEC register.
REGISTER 19-2: PADCFG1: PAD CONFIGURATION CONTROL REGISTER
U-0
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
bit 15
U-0
—
bit 8
U-0
U-0
U-0
U-0
U-0
U-0
R/W-0
R/W-0
—
—
—
—
—
—
RTSECSEL⁽¹⁾ PMPTTL
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-2
bit 1
bit 0
Unimplemented: Read as ‘0’
RTSECSEL: RTCC Seconds Clock Output Select bit⁽¹⁾
1 = RTCC seconds clock is selected for the RTCC pin
0 = RTCC alarm pulse is selected for the RTCC pin
PMPTTL: PMP Module TTL Input Buffer Select bit
1 = PMP module inputs (PMDx, PMCS1) use TTL input buffers
0 = PMP module inputs use Schmitt Trigger input buffers
Note 1: To enable the actual RTCC output, the RTCOE (RCFGCAL<10>) bit must also be set.
DS39905E-page 214
 2010 Microchip Technology Inc.