IS61NSCS25672 Datasheet, PDF (4/32 Pages) Integrated Silicon Solution, Inc – RAM 256K x 72, 512K x 36 18Mb Synchronous SRAM

IS61NSCS25672
IS61NSCS51236
ISSI ^®
PIN DESCRIPTION TABLE
Symbol
A
A
ADV
Bx
Bx
Bx
CK
CQ
CQ
DQ
DQ
E1
E2 & E3
EP2 & EP3
TCK
TDI
TDO
TMS
M2, M3 & M4
SD
MCL
Pin Location
Description
A3, A5, A7, A9, B7, U4,
U6, U8, V3, V4, V5, V6,
V7, V8, V9, W5, W6, W7
Address
B5
Address
A6
Advance
B3, C9
Byte Write Enable
B8, C4
Byte Write Enable
B4, B9, C3, C8
Byte Write Enable
K3
Clock
K1, K11
Echo Clock
K2, K10
Echo Clock
E2, F1, F2, G1, G2, H1,
H2, J1, J2, L10, L11,
M10, M11, N10, N11,
P10, P11, R10
A10, A11, B10, B11,
C10, C11, D10, D11,
E11, R1, T1, T2, U1, U2,
V1, V2, W1, W2
Data I/O
Data I/O
A1, A2, B1, B2, C1, C2,
D1, D2, E1, E10, F10,
F11, G10, G11, H10,
H11, J10, J11, L1, L2,
M1, M2, N1, N2, P1, P2,
R2, R11, T10, T11, U10,
U11, V10, V11, W10,
W11
Data I/O
C6
Chip Enable
A4, A8
Chip Enable
G6, H6
Chip Enable Program Pin
W9
Test Clock
W4
Test Data In
W8
Test Data Out
W3
Test Mode Select
L6, M6, J6
Mode Control Pins
N6
Slow Down
B3, C9, D6, K6
P6, T6, W6
Must Connect Low
Type
Input
Input
Input
Input
Input
Input
Input
Output
Output
Input/Output
Input/Output
Input/Output
Input
Input
Input
Input
Input
Output
Input
Input
Input
Input
Comments
—
x36 version
Active High
Active Low (all versions)
Active Low (x36 and x72 versions)
Active Low (x72 version only)
Active High
Active High
Active Low
x36, and x72 versions
x72 version only
Active Low
Programmable Active High or Low
—
Active High
—
—
—
—
Active Low
—
4
Integrated Silicon Solution, Inc. — 1-800-379-4774
ADVANCE INFORMATION Rev. 00A
06/19/01