IS61NSCS25672 Datasheet, PDF (27/32 Pages) Integrated Silicon Solution, Inc – RAM 256K x 72, 512K x 36 18Mb Synchronous SRAM

IS61NSCS25672
IS61NSCS51236
ISSI ^®
TAP CONTROLLER INSTRUCTION SET
Overview
There are two classes of instructions defined in the
Standard 1149.1-1990; standard (public) instructions, and
device specific (private) instructions. Some public instructions
are mandatory for 1149.1 compliance. Optional public
instructions must be implemented in prescribed ways.
The TAP on this device may be used to monitor all input
and I/O pads.This device will not perform INTEST but can
preform the preload portion of the SAMPLE/PRELOAD
command.
When the TAP controller is placed in Capture-IR state, the
two least significant bits of the instruction register are
loaded with 01. When the controller is moved to the Shift-IR
state, the Instruction Register is placed between TDI and
TDO. In this state the desired instruction is serially loaded
through the TDI input (while the previous contents are
shifted out at TDO). For all instructions, the TAP executes
newly loaded instructions only when the controller is
moved to Update-IR state. The TAP instruction set for this
device is listed in the JTAG TAP Instruction Set Summary.
JTAG TAP Instruction Set Summary
Instruction
Code
Description
EXTEST⁽¹⁾
000
Places the Boundary Scan Register between TDI and TDO. When EXTEST is
selected, data will be driven out of the DQ pad.
IDCODE^(1,2)
001
Preloads ID Register and places it between TDI and TDO.
SAMPLE-Z⁽¹⁾
010
Captures I/O ring contents. Places the Boundary Scan Register between TDI
and TDO. Forces all Data and Clock output drivers to High-Z.
RFU⁽¹⁾
011
Do not use this instruction; Reserved for Future Use. Replicates BYPASS
instruction. Places Bypass Register between TDI and TDO.
SAMPLE/PRELOAD⁽¹⁾ 100
Captures I/O ring contents. Places the Boundary Scan Register between TDI and TDO.
Private⁽¹⁾
101
Private instruction.
RFU⁽¹⁾
110
Do not use this instruction; Reserved for Future Use.
BYPASS⁽¹⁾
111
Places Bypass Register between TDI and TDO.
Notes:
1. Instruction codes expressed in binary, MSB on left, LSB on right.
2. Default instruction automatically loaded at power-up and in Test-Logic-Reset state.
Integrated Silicon Solution, Inc. — 1-800-379-4774
27
ADVANCE INFORMATION Rev. 00A
06/19/01