TC1796 Datasheet, PDF (95/134 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller TriCore

TC1796
Electrical Parameters
8) ADC module capability.
9) Not subject to production test, verified by design / characterization.
10) Value under typical application conditions due to integration (switching noise, etc.).
11) The sum of DNL/INL/Gain/Offset errors does not exceed the related TUE total unadjusted error.
12) For 10-bit conversions the DNL/INL/Gain/Offset error values must be multiplied with factor 0.25.
For 8-bit conversions the DNL/INL/Gain/Offset error values must be multiplied with 0.0625.
13) The leakage current definition is a continuous function, as shown in Figure 24. The numerical values defined
determine the characteristic points of the given continuous linear approximation - they do not define step
function.
14) Only one of these parameters is tested, the other is verified by design characterization.
15) I_{AREF_MAX} is valid for the minimum specified conversion time. The current flowing during an ADC conversion
with a duration of up to t_C = 25µs can be calculated with the formula I_{AREF_MAX} = Q_CONV/t_C. Every conversion
needs a total charge of Q_CONV = 150pC from V_AREF.
All ADC conversions with a duration longer than t_C = 25µs consume an I_{AREF_MAX} = 6µA.
16) For the definition of the parameters see also Figure 23.
17) Applies to AIN0 and AIN1, when used as auxiliary reference inputs.
18) This represents an equivalent switched capacitance. This capacitance is not switched to the reference voltage
at once. Instead of this smaller capacitances are successively switched to the reference voltage.
19) The sampling capacity of the conversion C-Network is pre-charged to V_AREF/2 before the sampling moment.
Because of the parasitic elements the voltage measured at AINx is lower then V_AREF/2, typically 0.85V.
Data Sheet
95
V1.0, 2008-04