TC1796 Datasheet, PDF (123/134 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller TriCore

TC1796
Electrical Parameters
4.3.10 EBU Burst Mode Read Timing
V_SS = 0 V;V_DD = 1.5 V ± 5%; V_DDEBU = 2.5 V ± 5% and 3.3 V ± 5%, Class B pins;
T_A = -40 °C to +125 °C; C_L = 35 pF;
Table 30 EBU Burst Mode Read Timing Parameters¹⁾
Parameter
Symbol
Min.
Values
Typ. Max.
Unit Note /
Test Con
dition
Output delay from BFCLKO t₁₀ CC 0
–
5
ns –
rising edge
RD active/inactive after
BFCLKO rising edge
t₁₂ CC 0
–
5
ns –
CSx output delay from
BFCLKO rising edge
t₂₁ CC 0
–
4
ns –
ADV/BAA active/inactive after t₂₂ CC 0
–
4
ns –
BFCLKO rising edge²⁾
Data setup to BFCLKI rising t₂₃ SR 3
–
–
ns –
edge
Data hold from BFCLKI rising t₂₄ SR 0
–
–
ns –
edge
WAIT setup (low or high) to t₂₅ SR 3
–
–
ns –
BFCLKI rising edge
WAIT hold (low or high) from t₂₆ SR 2
–
–
ns –
BFCLKI rising edge
1) Not subject to production test, verified by design/characterization.
2) This parameter is valid for BFCON.EBSE0 = 1 (or BFCON.EBSE1 = 1). Note that t₂₂ is increased by:
1/2 of the LMB bus clock period T_CPU = 1/f_CPU when BFCON.EBSE0 = 0 (or BFCON.EBSE1 = 0).
Data Sheet
123
V1.0, 2008-04