TC1796 Datasheet, PDF (70/134 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller TriCore

TC1796
Functional Description
• Important debugging support is provided through the reset pre-warning operation by
first issuing an NMI to the CPU before finally resetting the device after a certain
period of time.
3.19
System Control Unit
The System Control Unit (SCU) of the TC1796 handles several system control tasks.
These system control tasks of the SCU are:
• Clock system selection and control
• Reset and boot operation control
• Power management control
• Configuration input sampling
• External Request Unit
• System clock output control
• Chip select generation for EBU
• EBU pull devices control
• On-chip SRAM Parity Control
• Pad driver temperature compensation control
• Emergency stop input control for GPTA outputs
• Die Temperature Sensor
• GPTA1 input IN0 control
• Pad Test Mode control for dedicated pins
• ODCS level 2 trace control
• NMI control
• Miscellaneous SCU control
3.20
Boot Options
The TC1796 booting schemes provide a number of different boot options for the start of
code execution. Table 7 shows the boot options available in the TC1796.
Data Sheet
70
V1.0, 2008-04