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TC1796 Datasheet, PDF (37/134 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller TriCore | |||
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TC1796
Functional Description
3.2
On-Chip Memories
As shown in the TC1796 block diagram on Page 10, some of the TC1796 units provide
on-chip memories that are used as program or data memory.
⢠Program memory in PMU and PMI
â 2 Mbyte on-chip Program Flash (PFLASH)
â 16 Kbyte Boot ROM (BROM)
â 48 Kbyte Scratch-Pad RAM (SPRAM)
â 16 Kbyte Instruction Cache (ICACHE)
⢠Data memory in DMU, PMU and DMI
â 56 Kbyte Local Data RAM (LDRAM)
â 8 Kbyte Dual-port RAM (DPRAM)
â 64 Kbyte Data Memory (SRAM)
â 16 Kbyte data memory (SBRAM) for standby operation during power-down
â 128 Kbyte on-chip Data Flash (DFLASH)
⢠Memory of the PCP2
â 32 Kbyte Code Memory (CMEM)
â 16 Kbyte Parameter Memory (PRAM)
⢠On-chip SRAMs with parity error detection
Features of the Program Flash
⢠2 Mbyte on-chip program Flash memory
⢠Usable for instruction code execution or constant data storage
⢠256-byte wide program interface
â 256 bytes are programmed into PFLASH page in one step/command
⢠256-bit read interface
â Transfer from PFLASH to CPU/PMI by four 64-bit single-cycle burst transfers
⢠Dynamic correction of single-bit errors during read access
⢠Detection of double bit errors
⢠Fixed sector architecture
â Eight 16 Kbyte, one 128 Kbyte, one 256 Kbyte, and three 512 Kbyte sectors
â Each sector separately erasable
â Each sector separately write-protectable
⢠Configurable read protection for complete PFLASH with sophisticated read access
supervision, combined with write protection for complete PFLASH (protection against
âTrojan horseâ software)
⢠Configurable write protection for each sector
â Each sector separately write-protectable
â With capability to be re-programmed
â With capability to be locked forever (OTP)
⢠Password mechanism for temporarily disable write or read protection
⢠On-chip programming voltage generation
⢠PFLASH is delivered in erased state (read all zeros)
Data Sheet
37
V1.0, 2008-04
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