TC1130 Datasheet, PDF (70/113 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller

TC1130
Clock Generation Unit
The Clock Generation Unit (CGU) allows a very flexible clock generation for TC1130.
The power consumption is indirect proportional to the frequency, whereas the
performance of the microcontroller is direct proportional to the frequency. During user
program execution the frequency can be programmed for an optimal ratio between
performance and power consumption. Therefore the power consumption can be
adapted to the actual application state.
Features
The Clock Generation Unit serves different purposes:
• PLL Feature for multiplying clock source by different factors
• Direct Drive for direct clock put through
• Comfortable state machine for secure switching between basic PLL, direct or
prescaler operation
• Power Down Mode support
• USB Clock source and control
The Clock Generation Unit in the TC1130, shown in Figure 19, consists of an oscillator
circuit and one Phase-Locked Loop (PLL). The PLL can convert a low-frequency
external clock signal to a high-speed internal clock for maximum performance. The PLL
also has fail-safe logic that detects degenerate external clock behavior such as abnormal
frequency deviations or a total loss of the external clock. It can execute emergency
actions if it losses the lock on the external clock.
In general, the Clock Generation Unit (CGU) is controlled through the System Control
Unit (SCU) module of the TC1130.
XTAL1
XTAL2
Clock Generation Unit
CGU
Oscillator
Circuit
f_OSC
Osc.
Run
Detect.
P
Divi-
der
1
>1
Phase
Detect.
VCO
f_{VCO MUX}
0
PLL
N
Divider
Lock
Detector
1:1/1:2
Divider
K:1/K:2
Divider
MUX
f_SYS
f_CPU
Divider
f _USB
MUX
P4.0/
USBCLK
OGC MOSC OSCR
PDIV OSC PLL_
[2:0] DISC LOCK
NDIV VCO_
[6:0] SEL[1:0]
VCO_ KDIV SYS PLL_
BYPASS [3:0] FSL BYPASS
USBC USBC
LDIV LSEL
Register OSC_CON
System Control Unit
SCU
Register PLL_CLC
Figure 19 Clock Generation Unit Block Diagram
Register SCU_CON
MCA04940mod
Data Sheet
66
V0.3, 2003-09