TC1130 Datasheet, PDF (51/113 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller

TC1130
Table 3
Block Address Map of Segment 15(cont’d)
Symbol Description
Address Range
Size
MLI0_ MLI0 Large Transfer Window 1
LP1
F021 0000_H - F021 FFFF_H 64 K Bytes
MLI0_ MLI0 Large Transfer Window 2
LP2
F022 0000_H - F022 FFFF_H 64 K Bytes
MLI0_ MLI0 Large Transfer Window 3
LP3
F023 0000_H - F023 FFFF_H 64 K Bytes
MLI1_ MLI1 Large Transfer Window 0
LP0
F024 0000_H - F024 FFFF_H 64 K Bytes
MLI1_ MLI1 Large Transfer Window 1
LP1
F025 0000_H - F025 FFFF_H 64 K Bytes
MLI1_ MLI1 Large Transfer Window 2
LP2
F026 0000_H - F026 FFFF_H 64 K Bytes
MLI1_ MLI1 Large Transfer Window 3
LP3
F027 0000_H - F027 FFFF_H 64 K Bytes
–
Reserved
ECU Ethernet Controller Unit
–
Reserved
CPU (Part of System Peripheral Bus)
F028 0000_H - F200 00FF_H
F200 0100_H - F200 05FF_H
F200 0600_H - F7E0FEFF_H
–
1280Bytes
–
CPU
SFRs
CPU Slave Interface
Reserved
MMU
Reserved
Memory Protection Registers
Reserved
Core Debug Register (OCDS)
Core Special Function Registers
(CSFRs)
F7E0 FF00_H -F7E0FFFF_H
F7E1 0000_H –F7E17FFF_H
F7E1 8000_H –F7E180FF_H
F7E1 8100_H -F7E1BFFF_H
F7E1 C000_H-F7E1EFFF_H
F7E1 F000_H- F7E1FCFF_H
F7E1 FD00_H-F7E1FDFF_H
F7E1 FE00_H-F7E1FEFF_H
256 Bytes
–
256 Bytes
–
12K Bytes
–
256 Bytes
256 Bytes
General Purpose Register (GPRs)
–
Reserved
Local Memory Buses (LMB)
F7E1 FF00_H-F7E1 FFFF_H
F7E2 0000_H -F7FFFFFF_H
256 Bytes
–
EBU External Bus Interface Unit
F800 0000_H - F800 03FF_H 1KBytes
Data Sheet
47
V0.3, 2003-09