TC1130 Datasheet, PDF (64/113 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller

TC1130
Interrupt System
An interrupt request can be serviced by the CPU which is called “Service Provider”.
Interrupt requests are referred as “Service Requests” in this document.
Each peripheral in the TC1130 can generate service requests. Additionally, the Bus
Control Unit, the Debug Unit, the DMA Controller and even the CPU itself can generate
service requests to the Service Provider. As shown in Figure 17, each unit that can
generate service requests is connected to one or multiple Service Request Nodes
(SRN). Each SRN contains a Service Request Control Register mod_SRCx, where
“mod” is the identifier of the service requesting unit and “x” an optional index. The SRNs
are connected to the Interrupt Control Unit (ICU) via the CPU Interrupt Arbitration Bus.
The ICU arbitrates service requests for the CPU and administers the Interrupt Arbitration
Bus.
Units which can generate service requests are:
– Asynchronous/Synchronous Serial Interfaces (ASC0 & ASC1 & ASC2) with 4
SRNs each
– High-Speed Synchronous Serial Interfaces (SSC0 & SSC1) with 3 SRNs each
– Inter IC Interface (IIC) with 3 SRNs
– Universal Serial Bus (USB) with 8 SRNs
– Micro Link Interface MLI0 with 4 SRNs and MLI1 with 2 SRNs
– General Purpose Timer Unit (GPTU) with 8 SRNs
– Capture/Compare Unit (CCU60 & CCU61) with 4 SRNs each
– MultiCAN (CAN) with 16 SRNs
– Ethernet Controller with 9 SRNs
– External Interrupts with 4 SRNs
– Direct Memory Access Controller (DMA) with 4 SRNs
– DMA Bus with 1 SRN
– System Timer (STM) with 2 SRNs
– Bus Control Units (SBCU and LBCU) with 1 SRN each
– Peripheral Control Processor (PCP) with 12 SRNs
– Central Processing Unit (CPU) with 4 SRNs
– Floating Point Unit (FPU) with 1 SRN
– Debug Unit (OCDS) with 1 SRN
The CPU can make service requests directly to itself (via the ICU). The CPU Service
Request Nodes are activated through software.
Data Sheet
60
V0.3, 2003-09