TC1130 Datasheet, PDF (36/113 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller

TC1130
General Purpose Timer Unit
Figure 10 shows a global view of all functional blocks of the General Purpose Timer Unit
(GPTU).
Clock
Control
f_GPTU0
Address
Decoder
SR0
SR1
SR2
SR3
Interrupt
Control
SR4
SR5
SR6
SR7
GPTU
Module
IN0
IN1
IN2
IN3
IN4
IN5
IN6
IN7
OUT0
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
Port 0
Control
P0.0/GPTU_0
P0.1/GPTU_1
P0.2/GPTU_2
P0.3/GPTU_3
P0.4/GPTU_4
P0.5/GPTU_5
P0.6/GPTU_6
P0.7/GPTU_7
Figure 10 General Block Diagram of the GPTU Interface
The GPTU consists of three 32-bit timers designed to solve such application tasks as
event timing, event counting, and event recording. The GPTU communicates with the
external world via eight I/O lines located at Port 0.
The three timers of GPTU Module T0, T1, and T2, can operate independently from each
other or can be combined:
General Features:
• All timers are 32-bit precision timers with a maximum input frequency of f_GPTU.
• Events generated in T0 or T1 can be used to trigger actions in T2
• Timer overflow or underflow in T2 can be used to clock either T0 or T1
• T0 and T1 can be concatenated to form one 64-bit timer
Features of T0 and T1:
• Each timer has a dedicated 32-bit reload register with automatic reload on overflow
• Timers can be split into individual 8-, 16-, or 24-bit timers with individual reload
registers
Data Sheet
32
V0.3, 2003-09