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| TC1130 Datasheet, PDF (102/113 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller | |||
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TC1130
Timing for Ethernet Signals
(Operating Conditions apply; CL = 50 pF)
Parameter
ETXCLK period (10 Mbps Ethernet)
ETXCLK high time (10 Mbps Ethernet)
ETXCLK low time (10 Mbps Ethernet)
ETXCLK period (100 Mbps Ethernet)
ETXCLK high time (100 Mbps Ethernet)
ETXCLK low time (100 Mbps Ethernet)
ERXCLK period (10 Mbps Ethernet)
ERXCLK high time (10 Mbps Ethernet)
ERXCLK low time (10 Mbps Ethernet)
ERXCLK period (100 Mbps Ethernet)
ERXCLK high time (100 Mbps Ethernet)
ERXCLK low time (100 Mbps Ethernet)
ERXD(3:0) input setup to ERXCLK
ERXD(3:0) input hold from ERXCLK
ERXDV input setup to ERXCLK
ERXDV input hold from ERXCLK
ERXER input setup to ERXCLK
ERXER input hold from ERXCLK
ETXD(3:0) output valid from ETXCLK
ETXEN output valid from ETXCLK
ETXER output valid from ETXCLK
EMDC clock period
EMDC high time
EMDC low time
EMDIO input setup to EMDC (sourced by STA)
EMDIO input hold from EMDC (sourced by STA)
EMDIO output valid from EMDC (sourced by PHY)
Symbol
Limits
Unit
min max
t1 SR 400.0 â
ns
t2 SR 140 260 ns
t3 SR 140 260 ns
t1 SR 40.0 â
ns
t2 SR 14
26
ns
t3 SR 14
26
ns
t1 SR 400.0 â
ns
t2 SR 140 260 ns
t3 SR 140 260 ns
t1 SR 40.0 â
ns
t2 SR 14
26
ns
t3 SR 14
26
ns
t4 SR 10.0 â
ns
t5 SR â
10.0 ns
t4 SR 10.0 â
ns
t5 SR â
10.0 ns
t4 SR 10.0 â
ns
t5 SR â
10.0 ns
t6 CC â
25.0 ns
t6 CC â
25.0 ns
t6 CC â
25.0 ns
t7 CC 400.0 â
ns
t8 CC 160 â
ns
t9 CC 160 â
ns
t10 SR 10.0 â
ns
t11 SR â
10.0 ns
t12 CC â
300.0 ns
Note: Any other parameters which are not stated here, please refer to ANSI/IEEE Std 802.3, Section 22.3.
Data Sheet
98
V0.3, 2003-09
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