XC2700 Datasheet, PDF (58/62 Pages) Infineon Technologies AG – 16/32-Bit Single-Chip Microcontroller

5.4
Documentation Updates
XC2700 Derivatives
XC2000 Family / Alpha Line
Detailed Errata Description
EBC_X.D001 Visibility of Internal LXBus Cycles on External Address Bus
EBC chapter “Access Control to LXBus Modules” receives the following correction:
In the first paragraph the term “read mode” is replaced by “tri-state mode”.
The following is added:
Despite the above mentioned measures, accesses to internal LXBus modules are to
some extent reflected on the non-multiplexed address pins A[23:0] of the external bus.
1. During an internal LXBus access, the external address bus is tri-stated. The switch
to tri-state mode occurs in the same cycle as the internal LXBus access. This may
induce residual voltage which can lead to undefined logic levels on the address bus
pins. Those in turn can cause unwanted switching activity on attached device input
stages. Therefore attached devices should be equipped with an input hysteresis filter
to avoid unwanted switching activity.
2. After an internal LXBus access is completed the address of the location accessed
last on the LXBus becomes visible on the external address bus, unless an external
bus cycle immediately follows the LXBus cycle. Due to this behavior, switching
activity on the address bus can be observed even if no external access is active.
Note: A functional impact due to this behavior is not expected because external bus
control signals are held inactive during the internal LXBus access.
ID_X.D001 Identification Register
Additional “Identification Registers” chapter for the Data Sheet.
Table 9
Identification Registers
Short Name
Value
Address
SCU_IDMANUF
SCU_IDCHIP
SCU_IDMEM
SCU_IDPROG
JTAG_ID
1820_H
2601_H
30BF_H
1313_H
0010’A083_H
1010’A083_H
00’F07E_H
00’F07C_H
00’F07A_H
00’F078_H
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Notes
marking EES-AA
marking EES-AB, ES-AB, AB,
EES-AC, ES-AC or AC
Errata Sheet
58
V1.7, 2014-10