XC2700 Datasheet, PDF (50/62 Pages) Infineon Technologies AG – 16/32-Bit Single-Chip Microcontroller

XC2700 Derivatives
XC2000 Family / Alpha Line
Detailed Errata Description
• TCK_A must be stable on a valid low or high level until the change of the JTAG
interface was executed.
• A Halt after reset can be achieved by a program loop that is left by control through
the debugger.
Verify the correct operation of the sequence within the actual application.
LXBUS_X.H001 Do Not Access Reserved Locations on the LXBus
Some of the on-chip peripherals are connected via the LXBus. The EBC controls this
access by using CS7 to define the LXBus area.
The memory map lists several sections occupied by the on-chip LXBus peripherals
MultiCAN and the USIC modules.
The reserved sections within the address range 20’0000_H ... 20’FFFF_H shown in the
memory map are designated to additional peripherals for future derivatives. The sizes of
the reserved sections depend on the chosen device type.
These reserved sections must not be accessed by user software nor by debuggers.
Access to these sections may lead to a CPU lock situation caused by a bus lock and also
makes the software incompatible with other derivatives. The error mode can only be left
by a reset.
MultiCAN_AI.H005 TxD Pulse upon short disable request
If a CAN disable request is set and then canceled in a very short time (one bit time or
less) then a dominant transmit pulse may be generated by MultiCAN module, even if the
CAN bus is in the idle state.
Example for setup of the CAN disable request:
MCAN_KSCCFG.MODEN = 0 and then MCAN_KSCCFG.MODEN = 1
CAN_CLC.DISR = 1 and then CAN_CLC.DISR = 0
PMCON1.CAN_DIS = 1 and then PMCON1.CAN_DIS = 0
Workaround
Set all INIT bits to 1 before requesting module disable.
Errata Sheet
50
V1.7, 2014-10