XC2700 Datasheet, PDF (34/62 Pages) Infineon Technologies AG – 16/32-Bit Single-Chip Microcontroller

XC2700 Derivatives
XC2000 Family / Alpha Line
Detailed Errata Description
Workaround
If Tx FIFO overflow interrupt needed, take the FIFO base object out of the circular list of
the Tx message objects. That is to say, just use the FIFO base object for FIFO control,
but not to store a Tx message.
List X
base object:
MO s
Figure 3 FIFO structure
MO c
MO n
MO l
MO a
MO z
TxFiFo
MultiCAN_TC.030 Wrong transmit order when CAN error at start of CRC
transmission
The priority order defined by acceptance filtering, specified in the message objects,
define the sequential order in which these messages are sent on the CAN bus. If an error
occurs on the CAN bus, the transmissions are delayed due to the destruction of the
message on the bus, but the transmission order is kept. However, if a CAN error occurs
when starting to transmit the CRC field, the arbitration order for the corresponding CAN
node is disturbed, because the faulty message is not retransmitted directly, but after the
next transmission of the CAN node.
CAN
bus
Figure 4
crc
field
error
Errata Sheet
34
V1.7, 2014-10