XC2700 Datasheet, PDF (25/62 Pages) Infineon Technologies AG – 16/32-Bit Single-Chip Microcontroller

XC2700 Derivatives
XC2000 Family / Alpha Line
Detailed Errata Description
Workaround 2
Do not use local register banks, use only global register banks.
Workaround 3
Locate the system stack in a memory other than the DPRAM, e.g. in DSRAM.
INT_X.008 HW Trap during Context Switch in Routine using a Local Bank
When a hardware trap occurs under specific conditions in a routine using a local register
bank, the CPU may stall, preventing further code execution. Recovery from this condition
can only be made through a hardware or watchdog reset.
All of the following conditions must be present for this problem to occur:
• The routine that is interrupted by the hardware trap is using one of the local register
banks (bit field PSW.BANK = 10_B or 11_B)
• The system stack is located in the internal dual-ported RAM (DPRAM, locations
0F600_H ... 0FDFF_H)
• The hardware trap occurs in the second half (load phase) of a context switch
operation triggered by one of the following actions:
– a) Execution of the IDLE instruction, or
– b) Execution of an instruction writing to the Context Pointer register CP (untypical
case, because this would mean that the routine using one of the local banks
modifies the CP contents of a global bank)
Workaround 1
Locate the system stack in a memory other than the DPRAM, e.g. in DSRAM.
Workaround 2
Do not use local register banks, use only global register banks.
Workaround 3
Condition b) (writing to CP while a local register bank context is selected) is not typical
for most applications. If the application implementation already eliminates the possibility
for condition b), then only a workaround for condition a) is required.
The workaround for condition a) is to make sure that the IDLE instruction is executed
within a code sequence that uses a global register bank context.
Errata Sheet
25
V1.7, 2014-10