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XC2700 Datasheet, PDF (18/62 Pages) Infineon Technologies AG – 16/32-Bit Single-Chip Microcontroller
XC2700 Derivatives
XC2000 Family / Alpha Line
Detailed Errata Description
5
Detailed Errata Description
This chapter provides a detailed description for each erratum. If applicable a workaround
is suggested.
5.1
Functional Deviations
ADC_AI.001 Conversions requested in Slot 0 started twice
A conversion n+1 requested in arbiter slot 0 will be started twice if all configuration and
timing conditions of the following sequence are met:
1. A conversion n of a channel is currently running.
2. Slot 0 has won the arbitration while conversion n is in progress.
3. Conversion n ends one fADCD clock cycle before the end of an arbitration cycle.
4. The conversion n+1 initiated in slot 0 is started exactly in the last fADCD clock cycle of
this arbitration-cycle (see 3.).
5. The conversion time of conversion n+1 is shorter than 2 arbitration cycles.
If all these conditions are met, then the request of slot 0 cannot be cleared in time by the
arbiter, and conversion n+1 is requested a second time.
Workaround
The conversion time for channels requested in slot 0 must not be shorter than two
arbitration cycles.
BROM_TC.006 Baud Rate Detection for CAN Bootstrap Loader
In a specific corner case, the baud rate detected during reception of the initialization
frame for the CAN bootstrap loader may be incorrect. The probability for this sporadic
problem is relatively low, and it decreases with decreasing CAN baud rate and
increasing module clock frequency.
Workaround:
If communication fails, the host should repeat the CAN bootstrap loader initialization
procedure after a reset of the device.
Errata Sheet
18
V1.7, 2014-10