XC2700 Datasheet, PDF (26/62 Pages) Infineon Technologies AG – 16/32-Bit Single-Chip Microcontroller

XC2700 Derivatives
XC2000 Family / Alpha Line
Detailed Errata Description
INT_X.009 Delayed Interrupt Service of Requests using a Global Bank
Service of an interrupt request using a global register bank is delayed - regardless of its
priority - if it would interrupt a routine using one of the local register banks in the following
situations:
Case 1:
• The Context Pointer CP is written to (e.g. by POP, MOV, SCXT ... instructions) within
a routine that uses one of the local register banks (bit field PSW.BANK = 10_B or 11_B),
• Then an interrupt request occurs which is programmed (with GPRSELx = 00_B) to
automatically use the global bank via the bank selection registers BNKSEL0...3 (i.e.
the interrupting routine has a priority level ≥12).
Note that this scenario is regarded as untypical case, because this would mean that the
routine using one of the local banks modifies the CP contents of a global bank.
In this case service of the interrupt request is delayed until bit field PSW.BANK becomes
00_B, e.g. by explicitly writing to the PSW, or by an implicit update from the stack when
executing the RETI instruction at the end of the routine using the local bank.
Case 2 (see also Figure 1):
• The Context Pointer CP is written to (e.g. by POP, MOV, SCXT ... instructions) within
a routine (Task A) that uses a global register bank (bit field PSW.BANK = 00_B), i.e.
the context for this routine will be modified,
• This context switch procedure (19 cycles) is interrupted by an interrupt request (Task
B) which is programmed (with GPRSELx = 1X_B) to automatically use one of the local
banks via the bank selection registers BNKSEL0...3 (i.e. the interrupting routine has
a priority level ≥12),
• Before the corresponding interrupt service routine is finished, another interrupt
request (Task C) occurs which is programmed (with GPRSELx = 00_B) to
automatically use the global bank via the bank selection registers BNKSEL0...3 (i.e.
the interrupting routine has a priority level ≥13)
In this case service of this interrupt request (for Task C) is delayed until bit field
PSW.BANK becomes 00_B after executing the RETI instruction at the end of the routine
(Task B) using the local bank.
Errata Sheet
26
V1.7, 2014-10