XC2700 Datasheet, PDF (40/62 Pages) Infineon Technologies AG – 16/32-Bit Single-Chip Microcontroller

XC2700 Derivatives
XC2000 Family / Alpha Line
Detailed Errata Description
RESET_X.004 Sticky “Register Access Trap” forces device into power-
save mode after reset.
The system control unit (SCU) provides trap generation, to respond to certain system
level events or faults. Certain trap sources maintain sticky trap flags which are only
cleared explicitly by software, or by a power-on reset. These sticky trap flags are
contained in the SCU register DMPMIT.
In case the “Register Access Trap” flag (DMPMIT.RAT) becomes set, but is not cleared
before a debug, internal application, or application reset occurs, then the microcontroller
will reset, but will fail to start-up correctly. The microcontroller start-up software will
detect that the sticky trap flag is set, and will force the device into power-save mode with
DMP_1 shut down and DMP_M powered.
Workaround
In response to the trap event, software must explicitly clear the sticky trap flag using the
SCU register DMPMITCLR, before executing a debug, internal application, or
application reset.
Note that this workaround does not address unexpected debug, internal application, or
application resets which occur between the sticky trap event and the clearing of the
sticky flags by software. To keep this exposure period as short as possible, it is
recommended to clear the flag early in the trap routine.
Note: Register DMPMITCLR is protected by the register security mechanism after
execution of the EINIT instruction and must be unlocked before accessing.
RTC_X.003 Interrupt Generation in Asynchronous Mode
Asynchronous Mode must be selected (bit RTCCM = 1_B in register RTCCLKCON)
whenever the system clock is less than 4 times faster than the RTC count input clock
(f_SYS < f_RTC × 4). While in Asynchronous Mode, generation of the RTC interrupt via flag
RTCIR in register RTC_IC does not work correctly.
Workaround 1
Select the system clock such that it is at least 4 times faster than the RTC count input
clock (f_SYS ≥ f_RTC × 4) and operate the RTC in Synchronous Mode.
Workaround 2
Before switching from Synchronous to Asynchronous Mode, clear the individual interrupt
enable bits (CNTxIE, T14IE) in register RTC_ISNC. After returning to Synchronous
Mode, set the individual interrupt enable bits as required by the application. Then flag
Errata Sheet
40
V1.7, 2014-10