XC2700 Datasheet, PDF (15/62 Pages) Infineon Technologies AG – 16/32-Bit Single-Chip Microcontroller

XC2700 Derivatives
XC2000 Family / Alpha Line
Short Errata Description
4.3
Application Hints
Table 4 shows a short description of the application hints.
Table 4
Application Hints
Hint
Short Description
Chg Pg
ADC_AI.H002
Minimizing Power Consumption of an ADC
45
Module
CAPCOM12_X.H001 Enabling or Disabling Single Event Operation
45
CC6_X.H001
Modifications of Bit MODEN in Register
46
CCU6x_KSCFG
GPT12_AI.H001
Modification of Block Prescalers BPS1 and
47
BPS2
GPT12E_X.H002
Reading of Concatenated Timers
47
INT_X.H002
Increased Latency for Hardware Traps
48
INT_X.H004
SCU Interrupts Enabled After Reset
49
JTAG_X.H001
JTAG Pin Routing
49
LXBUS_X.H001
Do Not Access Reserved Locations on the
50
LXBus
MultiCAN_AI.H005 TxD Pulse upon short disable request
50
MultiCAN_AI.H006 Time stamp influenced by resynchronization
51
MultiCAN_AI.H007 Alert Interrupt Behavior in case of Bus-Off
51
MultiCAN_AI.H008 Effect of CANDIS on SUSACK
51
MultiCAN_TC.H002 Double Synchronization of receive input
52
MultiCAN_TC.H003 Message may be discarded before
52
transmission in STT mode
MultiCAN_TC.H004 Double remote request
52
OCDS_X.H002
Suspend Mode Behavior for MultiCAN
53
PVC_X.H001
PVC Threshold Level 2
54
RESET_X.H003
How to Trigger a PORST after an Internal
55
Failure
RTC_X.H003
Changing the RTC Configuration
55
StartUp_X.H002
FCONCS0..FCONCS4 Registers are Always
55
Configured in External Start-Up Mode
USIC_AI.H001
FIFO RAM Parity Error Handling
56
Errata Sheet
15
V1.7, 2014-10