XC2700 Datasheet, PDF (46/62 Pages) Infineon Technologies AG – 16/32-Bit Single-Chip Microcontroller

XC2700 Derivatives
XC2000 Family / Alpha Line
Detailed Errata Description
have occurred. In these cases, the timing relation of the channels must be considered,
otherwise the following typical problem may occur:
• In the Memory stage, software reads register CCn_SEE with bit SEEy = 1_B (event for
channel CCy has not yet occurred)
• Meanwhile, event for CCy occurs, and bit SEEy is cleared to 0_B by hardware
• In the Write-Back stage, software writes CCn_SEE with bit SEEx = 1_B (intended event
for CCx enabled via OR instruction) and bit SEEy = 1_B
• or, as inverse procedure, software writes CCn_SEE with bit SEEx = 0_B (intended
event for CCx disabled via AND instruction) and bit SEEy = 1_B
In these cases, another unintended event for channel CCy is enabled.
To avoid this effect, one of the following solutions - depending on the characteristics of
the application - is recommended to enable or disable further compare events for
CAPCOM channels concurrently operating in single event mode:
• Modify register CCn_SEE only when it is ensured that no compare event in single
event mode can occur, i.e. when CCn_SEE = 0x0000, or
• Modify register CCn_SEE only when it is ensured that there is a sufficient time
distance to the events of all channels operating in single event mode, such that none
of the bits in CCn_SEE can change in the meantime, or
• Use single event operation for one channel only (i.e. only one bit SEMx may be = 1_B),
and/or
• Use one of the standard compare modes, and emulate single event operation for a
channel CCs by disabling further compare events in bit field MODs (in register
CCn_Mz) in the corresponding interrupt service routine. Writing to register CCn_Mz is
uncritical, as this register is not modified by hardware.
CC6_X.H001 Modifications of Bit MODEN in Register CCU6x_KSCFG
For each module, setting bit MODEN = 0 immediately switches off the module clock.
Care must be taken that the module clock is only switched off when the module is in a
defined state (e.g. stop mode) in order to avoid undesired effects in an application.
In addition, for a CCU6 module in particular, if bit MODEN is changed to 0 while the
internal functional blocks have not reached their defined stop conditions, and later
MODEN is set to 1 and the mode is not set to run mode, this leads to a lock situation
where the module clock is not switched on again.
Errata Sheet
46
V1.7, 2014-10