RF60 Datasheet, PDF (54/157 Pages) –

RF60 CRYSTAL-LESS SOC TRANSMITTER v1.0
14. Low Power Oscillator and System Clock Generator
The source of all digital system clocks is derived from the low power oscillator (LPOSC) and system clock
generator. The LPOSC produces a 24MHz clock signal and is used by the system clock generator to pro-
duce the system clock. This system clock is applied to all digital blocks including the MCU and is program-
mable via the SYSGEN SFR register which is useful for power savings. Users are recommended to use
the System Module Function API to set the registers.
14.1. Register Description
XREG Definition 14.1. bLPOSC_TRIM
Bit
7
6
5
4
3
2
1
0
Name
LPOSC_TRIM[7:0]
Type
R/W
Reset
1
1
1
1
1
1
1
1
XREG Address = 0x4002
Bit Name
Function
7:0 LPOSC_ _{Low Power Oscillator Trimming.}
TRIM[7:0] _{±16% range with 0.14 % resolution. Setting all the bits to low will maximize the fre-}
quency of operation.
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