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RF60 Datasheet, PDF (116/157 Pages) –
RF60 CRYSTAL-LESS SOC TRANSMITTER v1.0
29.4. Pullup Roff and Matrix Mode Option Control
Both Roff and Matrix mode options are controlled by the GPIO pad itself. The control is implemented as 2
bit latch inside of the GPIO pads. Both options stay in their used defined states during chip shutdown. In
other words, if the chip is in shutdown mode, the digital logic does not have power, but the two GPIO
latches keep the user set values of those options.
The options are controlled by the PORT_CTRL SFR register. The user has to strobe the desired values to
the GPIO latches by software sequence. The latch enable is a PORT_STROBE bit in the PORT_CTRL
register.
For example, to disable the both Matrix and Roff options at the beginning of use application, the user code
should look like this in assembly:
anl PORT_CTRL, #10011111B
orl PORT_CTRL, #10000000B
PORT_CTRL, #01111111B
; Clear PORT_MATRIX and PORT_ROFF
; Set PORT_STROBE=1 anl
; Clear PORT_STROBE=0
Using masks in the header:
anl PORT_CTRL, #NOT(M_PORT_MATRIX OR M_PORT_ROFF)
orl PORT_CTRL, #M_PORT_STROBE
anl PORT_CTRL, #NOT(M_PORT_STROBE)
The toggle of the PORT_STROBE from 0 to 1 back to 0 latches the current register values of
PORT_MATRIX and PORT_ROFF.
To summarize: To change the values of the Matrix an Roff options, the following software sequence is
required:
1. Set the desired values of PORT_MATRIX and PORT_ROFF bits in the PORT_CTRL register.
2. Toggle the PORT_STROBE bit in the PORT_CTRL register from 0 to 1 back to 0 while not changing any
other bit in the PORT_CTRL register. The new Matrix and Roff control values are latched into the
GPIO.
3. Note that while reading the PORT_CTRL the current value of the Matrix and Roff options is read from
the GPIO, not the value of the write register for the new Matrix and Roff setting.
Invoking a Matrix mode requires the following sequence:
1. Set the GPIO[3:1] as inputs, which means writing 1 to the port value and making the driver open drain.
2. Latch PORT_MATRIX=1 and PROT_ROFF=0 values to the GPIO option control latch.
In assembly:
orl P0,
#00001110B
; Turn GPIO[3:1] as inputs
anl P0CON,
#NOT 00001110B
anl PORT_CTRL, #NOT(M_PORT_MATRIX OR M_PORT_ROFF)
orl PORT_CTRL, #M_PORT_MATRIX ; Set Matrix mode and keep resistors orl
PORT_CTRL, #M_PORT_STROBE
; Strobe new Matrix/Roff modes to GPIO anl
PORT_CTRL, #NOT(M_PORT_STROBE)
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