RF60 Datasheet, PDF (131/157 Pages) –

RF60 CRYSTAL-LESS SOC TRANSMITTER v1.0
SFR Definition 31.4. RBIT_DATA
Bit
Name
7
6
Reserved
Type
Reset
R
0
0
5
GPIO_
LED_
DRIVE
R
0
4
XO_
CKGOOD
3
2
ODS_ ODS_NOD
EMPTY ATA
1
TRNG_
OUT
R
R
R
R
0
1
1
0
0
PA_
COMPOUT
R
0
SFR Address = 0xEE
Bit
Name
Function
7:6
RESERVED
Reserved.
Read as 0x0. Write has no effect.
5 GPIO_LED_DRIVE GPIO LED Drive.
Actual status of the LED drive. If this bit is at 1, then the LED driver is
actually on. This is a supplemental bit for DSR purposes. The LED
driver is controlled by P0.5 bit and the intensity value in
PORT_CTRL register. If the P0.5 bit is read, then it returns user LED
drive request, which does not reflect the actual LED driver status.
4
XO_CKGOOD Crystal Oscillator Clock Good.
Crystal oscillator XO output is stable. It takes about 5 ms before the
XO_ENA is set to 1 and the XO output becomes stable. When this
signal becomes 1, software must wait additional 3 ms before it can
use the XO output for frequency counting. See the XO_CTRL test
register.
3
ODS_EMPTY ODS Empty.
Supplementary flag indicating that the ODS Tx holding register is
empty. It can be used as an indication for software to write a new
data byte to ODS_DATA register to transmit. This applies to the Tx
holding register only. See ODS_NODATA for the flag related to the
actual Tx shift register.
2
ODS_NODATA ODS No Data.
Supplementary flag that the output digital serializer (ODS) Tx shift
register ran out of data and there is nothing else to transmit.
1
TMG_OUT
Thermal random number generator (RNG) output bit.
Note that the temperature sensor must be enabled in order to get an inter-
esting result here.
0 PA_COMPOUT Power amplified (PA) related bit.
Output of phase detection PA comparator. When PA is enabled, runs at full
clock rate, and is asynchronous to clk_sys. Should be demetastabilized suf-
ficiently by transferring to another register for purposes of getting to CPU.
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