RF60 Datasheet, PDF (140/157 Pages) –

TMR_CLKSEL
RF60 CRYSTAL-LESS SOC TRANSMITTER v1.0
clk_sys
clk_sys/12
rtc_tick (5.33us)
rtc_pulse (100us)
2
0
1
2
3
TMR2H_RUN
TMR2H
Capture
TMR2RH
2
0
1
2
3
TMR2L_RUN
TMR2L
INT1 for TMR3
INT0
Capture
TMR2RL
TMR2INTH
TMR2INTL
TMR2INTL_EN
TMR2SPLIT
TMR2H_CAP
TMR2L_CAP
TMR2H_RUN
TMR2L_RUN
Interrupt
Figure 33.5. Two 8-bit Timers in Capture/Capture Configuration (Split Mode)
33.6. 8-bit Timer/Capture Mode (Split Mode)
When TMR2SPLIT=1, TMR2L_CAP=1 and TMR2H_CAP=0, the split timers operate one in 8-bit timer
mode and the other in 8-bit capture mode. Same situation happens when TMR2L_CAP=0 and
TMR2H_CAP=1, only the roles of the timer 8-bit halves are reversed. The only difference in between these
two scenarios are the interrupt flags settings, since TMR2INTH and TMR2INTL are not symmetrical. The
TMR2INTL has a local enable TMR2INTL_EN. The functionality of the 8-bit timer and 8-bit capture modes
for the respective halves is the same as described above when both halves operate in the same mode.
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