HD404849 Datasheet, PDF (84/125 Pages) Hitachi Semiconductor – 4-Bit Single-Chip Microcomputer

State
MCU reset
PMRA write
SMRA write
SMRB write
SRL, SRU write
STS instruction
SCK pin (input)
SO pin
STS wait state
Transmit clock
wait state
Transfer state
Port selection
External clock selection
Output level control in
idle states
Data write for transmission
Undefined
LSB
,_IFS
 ^State
MCU reset
PMRA write
SMRA write
SMRB write
SRL, SRU write
STS instruction
SCK pin (output)
SO pin
STS wait state
External clock mode
Transmit clock
wait state
Transfer state
Port selection
Internal clock selection
Output level control in
idle states
Data write for transmission
Undefined
LSB
 ^IFS
HD404849 Series
Transmit clock
wait state
STS wait state
Dummy write for
state transition
Output level control in
idle states
MSB
Flag reset at transfer completion
STS wait state
Output level control in
idle states
MSB
Internal clock mode
Flag reset at transfer completion
Figure 68 Example of Serial Interface Operation Sequence
84