HD404849 Datasheet, PDF (33/125 Pages) Hitachi Semiconductor – 4-Bit Single-Chip Microcomputer

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HD404849Series
but the accuracy of the contents of the accumulator, B register, W register, X/SPX register, Y/SPY register,
carry flag, and serial data register cannot be guaranteed.
Oscillator
Internal
clock
Stop mode
RESET
or
STOPC
t_res
STOP instruction execution
t_res ≥ t_RC (stabilization period)
Figure 16 Timing of Stop Mode Cancellation
Watch Mode: In watch mode, the clock function (timer A) using the X1 and X2 oscillator and the LCD
function operate, but other function operations stop. Therefore, the power dissipation in this mode is the
second least to stop mode, and this mode is convenient when only clock display is used. In this mode, the
OSC₁ and OSC₂ oscillator stops, but the X1 and X2 oscillator operates. The MCU enters watch mode if the
STOP instruction is executed in active mode when TMA3 = 1, or if the STOP or SBY instruction is
executed in subactive mode.
Watch mode is terminated by a RESET input or a timer-A/INT₀ interrupt request. For details of RESET
input, refer to the Stop Mode section. When terminated by a timer-A/INT₀ interrupt request, the MCU
enters active mode if LSON = 0, or subactive mode if LSON = 1. After an interrupt request is generated,
the time required to enter active mode is t_RC for a timer A interrupt, and T_X (where T + t_RC < T_X < 2T + t_RC)
for an INT₀ interrupt, as shown in figures 17 and 18.
Operation during mode transition is the same as that at standby mode cancellation (figure 15).
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