HD404849 Datasheet, PDF (39/125 Pages) Hitachi Semiconductor – 4-Bit Single-Chip Microcomputer

HD404849 Series
In figure 24, the level of the INT₀ signal is sampled by an interrupt frame. In (a) the sampled value is
low at point A, and also low at point B. Therefore, a falling edge will not be detected. In (b), the
sampled value is high at point A, and also high at point B. A falling edge will not be detected in this
case either.
When the MCU is in watch mode or subactive mode, keep the high level and low level period of INT₀
longer than the interrupt frame.
INT₀
Sampling
High
Low
Low
Figure 23 Edge Detection
INT₀
INT₀
Interrupt
frame
A: Low
B: Low
Interrupt
frame
A: High
B: High
a. High level period
Figure 24 Sampling Example
b. Low level period
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